JPS57113178A - Arithmetic circuit - Google Patents

Arithmetic circuit

Info

Publication number
JPS57113178A
JPS57113178A JP18812080A JP18812080A JPS57113178A JP S57113178 A JPS57113178 A JP S57113178A JP 18812080 A JP18812080 A JP 18812080A JP 18812080 A JP18812080 A JP 18812080A JP S57113178 A JPS57113178 A JP S57113178A
Authority
JP
Japan
Prior art keywords
capacitor
input terminal
trs
operational amplifier
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18812080A
Other languages
Japanese (ja)
Other versions
JPH0157833B2 (en
Inventor
Toshiyuki Misawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP18812080A priority Critical patent/JPS57113178A/en
Publication of JPS57113178A publication Critical patent/JPS57113178A/en
Publication of JPH0157833B2 publication Critical patent/JPH0157833B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/18—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals
    • G06G7/184—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements
    • G06G7/186—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements using an operational amplifier comprising a capacitor or a resistor in the feedback loop
    • G06G7/1865—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements using an operational amplifier comprising a capacitor or a resistor in the feedback loop with initial condition setting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To solve the problem of the accumulation of fixed charge which occurs when only a capacitor is connected to the input terminal of an MOS operational amplifier, by connecting a switched capacitor between the output terminal and input terminal of an operational amplifier. CONSTITUTION:An operation amplifier 101 with MOS structure and capacitors 102 and 103 integrated in the same chip with said amplifier are provided, and the output terminal 106 of the operational amplifier 101 of an arithmetic circuit whose arithmetic coefficient is determined by the capacity ratio of said capacitors, and one input terminal 105, a switched capacitor consisting of a switch and a capacitor is connected. For example, the out-of-phase amplifying circuit in a figure is provided with MOS transistor TRs 202 and 203 operating as switches, and an integrated capacitor 201 as a discharging means for fixed charge, and out-of-phase clock signals are inputted to the gates of the TRs 202 and 203 to make a switched capacitor, consisting of the capacitor 201 and the TRs 202 and 203, operates equivalently to a resistance.
JP18812080A 1980-12-29 1980-12-29 Arithmetic circuit Granted JPS57113178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18812080A JPS57113178A (en) 1980-12-29 1980-12-29 Arithmetic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18812080A JPS57113178A (en) 1980-12-29 1980-12-29 Arithmetic circuit

Publications (2)

Publication Number Publication Date
JPS57113178A true JPS57113178A (en) 1982-07-14
JPH0157833B2 JPH0157833B2 (en) 1989-12-07

Family

ID=16218053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18812080A Granted JPS57113178A (en) 1980-12-29 1980-12-29 Arithmetic circuit

Country Status (1)

Country Link
JP (1) JPS57113178A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01132134U (en) * 1988-03-01 1989-09-07

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659368A (en) * 1979-10-17 1981-05-22 Fujitsu Ltd Switched capacitor integrator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659368A (en) * 1979-10-17 1981-05-22 Fujitsu Ltd Switched capacitor integrator

Also Published As

Publication number Publication date
JPH0157833B2 (en) 1989-12-07

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