JPS57123706A - Amplifying circuit - Google Patents

Amplifying circuit

Info

Publication number
JPS57123706A
JPS57123706A JP56008100A JP810081A JPS57123706A JP S57123706 A JPS57123706 A JP S57123706A JP 56008100 A JP56008100 A JP 56008100A JP 810081 A JP810081 A JP 810081A JP S57123706 A JPS57123706 A JP S57123706A
Authority
JP
Japan
Prior art keywords
output
signal
operational amplifier
sws
goes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56008100A
Other languages
Japanese (ja)
Inventor
Yoshitaka Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP56008100A priority Critical patent/JPS57123706A/en
Publication of JPS57123706A publication Critical patent/JPS57123706A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE: To perform the zero adjustment of an amplifier automatically by comparing the output of an operational amplifier with a reference voltage, and converting the output of a counter which goes up or down in accordance with the comparison output into an analog signal and then applying the analog signal to the operational amplifier.
CONSTITUTION: In a compensation mode set by closing a switch SWS3, closing an SWS2 permits a resistance R3 to generate a differential pulse, thereby triggering a monostable multivibrator MM. Then the MM generates a pulse for, for example, a 5 seconds holding time to close the SWS1, and also energizes an oscillator OSC. The output V0 of an operational amplifier A1 inputting a current from a radiation detector D1 in an ionization chamber is compared with a reference voltage by a comparator COM to output a signal SC. A reversible counter RC goes up in response to a pulse from the OSC when the polarity of the signal SC is positive, or goes down when negative. A signal obtained by processing the output of the RC by D/A conversion CDA is applied to the inverted input terminal of the A1, and the output V0 is held at a level 0 under control to compensate the offset of the A1, thereby performing its zero adjustment automatically. The SWS1 is opened 5 seconds later and a detection current from the detector D1 corresponds to a range resistance R2 to output the voltage V0.
COPYRIGHT: (C)1982,JPO&Japio
JP56008100A 1981-01-23 1981-01-23 Amplifying circuit Pending JPS57123706A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56008100A JPS57123706A (en) 1981-01-23 1981-01-23 Amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56008100A JPS57123706A (en) 1981-01-23 1981-01-23 Amplifying circuit

Publications (1)

Publication Number Publication Date
JPS57123706A true JPS57123706A (en) 1982-08-02

Family

ID=11683880

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56008100A Pending JPS57123706A (en) 1981-01-23 1981-01-23 Amplifying circuit

Country Status (1)

Country Link
JP (1) JPS57123706A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03177901A (en) * 1989-12-07 1991-08-01 Sharp Corp Automatic center adjustment circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676613A (en) * 1979-11-29 1981-06-24 Toshiba Corp Automatic offset calibrating circuit for operational amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676613A (en) * 1979-11-29 1981-06-24 Toshiba Corp Automatic offset calibrating circuit for operational amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03177901A (en) * 1989-12-07 1991-08-01 Sharp Corp Automatic center adjustment circuit

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