JPS57145352A - Lead frame for semiconductor - Google Patents

Lead frame for semiconductor

Info

Publication number
JPS57145352A
JPS57145352A JP56030997A JP3099781A JPS57145352A JP S57145352 A JPS57145352 A JP S57145352A JP 56030997 A JP56030997 A JP 56030997A JP 3099781 A JP3099781 A JP 3099781A JP S57145352 A JPS57145352 A JP S57145352A
Authority
JP
Japan
Prior art keywords
alloy
layer
lead frame
plating solder
solder layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56030997A
Other languages
Japanese (ja)
Other versions
JPS6244817B2 (en
Inventor
Ryozo Yamagishi
Osamu Yoshioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP56030997A priority Critical patent/JPS57145352A/en
Publication of JPS57145352A publication Critical patent/JPS57145352A/en
Publication of JPS6244817B2 publication Critical patent/JPS6244817B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a lead frame which is inexpensive and excellent in assembling workability by providing a plating solder layer partially on the surface of a base body whereon a layer of Ni or an Ni alloy or a layer of Co or a Co alloy is formed. CONSTITUTION:An Ni-P alloy plated layer 4 is formed on the tab 2 of a base body 1 made of an Fe-42% Ni alloy and a lead terminal 3. Furthermore, the plating solder layer 5 containing Pb of 95% is laid on the tab 2, and after a heated semiconductor element 6 is pressed thereon, a wire connection 7 of the element 6 with the lead terminal 3 is conducted. It is desirable that the plating solder layer 5 has a composition containing Pb of 80-98%, since the element is cracked frequently by a heat shock in a cycle of 150 deg.C and -50 deg.C when the content of Pb is less than 80%. when it is above 98%, the heat connectivity is reduced. The alloy layer may be formed on the whole surface or in a part thereof. This constitution enables preparation of the lead frame which is inexpensive, whereby the assembling workability is improved remarkably and which enables attainment of a highly reliable device.
JP56030997A 1981-03-04 1981-03-04 Lead frame for semiconductor Granted JPS57145352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56030997A JPS57145352A (en) 1981-03-04 1981-03-04 Lead frame for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56030997A JPS57145352A (en) 1981-03-04 1981-03-04 Lead frame for semiconductor

Publications (2)

Publication Number Publication Date
JPS57145352A true JPS57145352A (en) 1982-09-08
JPS6244817B2 JPS6244817B2 (en) 1987-09-22

Family

ID=12319226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56030997A Granted JPS57145352A (en) 1981-03-04 1981-03-04 Lead frame for semiconductor

Country Status (1)

Country Link
JP (1) JPS57145352A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57192057A (en) * 1981-05-22 1982-11-26 Hitachi Ltd Semiconductor device
JPS5914658A (en) * 1982-07-16 1984-01-25 Hitachi Cable Ltd Lead frame for semiconductor
JPS59149042A (en) * 1983-02-15 1984-08-25 Hitachi Cable Ltd Lead frame for semiconductor
JP2008124097A (en) * 2006-11-09 2008-05-29 Shinko Electric Ind Co Ltd Package for semiconductor device and method for manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5373969A (en) * 1976-12-14 1978-06-30 Toshiba Corp Lead frame for semicinductor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5373969A (en) * 1976-12-14 1978-06-30 Toshiba Corp Lead frame for semicinductor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57192057A (en) * 1981-05-22 1982-11-26 Hitachi Ltd Semiconductor device
JPS5914658A (en) * 1982-07-16 1984-01-25 Hitachi Cable Ltd Lead frame for semiconductor
JPS59149042A (en) * 1983-02-15 1984-08-25 Hitachi Cable Ltd Lead frame for semiconductor
JP2008124097A (en) * 2006-11-09 2008-05-29 Shinko Electric Ind Co Ltd Package for semiconductor device and method for manufacturing the same

Also Published As

Publication number Publication date
JPS6244817B2 (en) 1987-09-22

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