JPS5714921A - Monitoring system of clock period - Google Patents

Monitoring system of clock period

Info

Publication number
JPS5714921A
JPS5714921A JP8785780A JP8785780A JPS5714921A JP S5714921 A JPS5714921 A JP S5714921A JP 8785780 A JP8785780 A JP 8785780A JP 8785780 A JP8785780 A JP 8785780A JP S5714921 A JPS5714921 A JP S5714921A
Authority
JP
Japan
Prior art keywords
clock
pulse
period
monitor signal
clock period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8785780A
Other languages
Japanese (ja)
Inventor
Takaaki Furumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8785780A priority Critical patent/JPS5714921A/en
Publication of JPS5714921A publication Critical patent/JPS5714921A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To increase the reliability of a device, by detecting a fault of the clock pulse period through a simple logical circuit. CONSTITUTION:Two 1-shot multivibrators 8 and 9 are used to produce a single- pulse having a time width exceeding the upper limit of the allowable fluctuation range of the clock period. Such vibrators 8 and 9 are triggered alternately by the clock pulse 10, and the OR signal of these output pulses 13 and 16 is used for a monitor signal 14. A consecutive monitor signal is delivered if the pulse 10 is supplied with a prescribed period to show the normalcy of the clock period. In case the clock period is extended like the period A (#6-#7) to exceed the output pulse duration of the vibrator 9, the fall of the #7 clock pulse comes after the end of output pulse of the vibrator 9 to cause a discontinuation (a) of the monitor signal. Furthermore the #8 clock is also delayed to cause a discontinuation (b). As a result, a fault of the clock is detected.
JP8785780A 1980-06-30 1980-06-30 Monitoring system of clock period Pending JPS5714921A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8785780A JPS5714921A (en) 1980-06-30 1980-06-30 Monitoring system of clock period

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8785780A JPS5714921A (en) 1980-06-30 1980-06-30 Monitoring system of clock period

Publications (1)

Publication Number Publication Date
JPS5714921A true JPS5714921A (en) 1982-01-26

Family

ID=13926548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8785780A Pending JPS5714921A (en) 1980-06-30 1980-06-30 Monitoring system of clock period

Country Status (1)

Country Link
JP (1) JPS5714921A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4660201A (en) * 1984-03-13 1987-04-21 Nec Corporation Failure notice system in a data transmission system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036537A (en) * 1973-06-18 1975-04-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036537A (en) * 1973-06-18 1975-04-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4660201A (en) * 1984-03-13 1987-04-21 Nec Corporation Failure notice system in a data transmission system

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