JPS5715420A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5715420A JPS5715420A JP9044780A JP9044780A JPS5715420A JP S5715420 A JPS5715420 A JP S5715420A JP 9044780 A JP9044780 A JP 9044780A JP 9044780 A JP9044780 A JP 9044780A JP S5715420 A JPS5715420 A JP S5715420A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- concentration
- substrate
- atoms
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To obtain a back-surface electrode having excellent adhesion, by providing an ion implanted layer having higher concentration than a substrate but having the same conductive type on the back surface of the si substrate, and providing ohmic electrode directly thereon or on the exposed part of the surface layer. CONSTITUTION:The back surface of an N<+> collector 1 whose concentration is 5X10<18> atoms/cm<3> is ground, and P ions of 1X10<16> atoms/cm<3> are implanted at 100KeV. Then, a high-concentration layer 13, whose surface concentration is 8X 10<19> atoms/cm<3> is formed. Cr, Ni, Sn, and A gare sequentially evaporated on said layer 13 directly. Or they are evaporated on a high concentration layer 13' of 4X 10<20>/cm<3>, which is exposed by etching out the surface layer to the depth of about 0.2mu and an electrode 10 is obtained. In this constitution, the ohmic electrode which strongly adheres to the semiconductor substrate can be obtained, and the device having excellent characteristics is obtained. In the case of a P<+> substrate, the charactristics can be likewise improved by the implantation of B ions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9044780A JPS5715420A (en) | 1980-06-30 | 1980-06-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9044780A JPS5715420A (en) | 1980-06-30 | 1980-06-30 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5715420A true JPS5715420A (en) | 1982-01-26 |
Family
ID=13998864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9044780A Pending JPS5715420A (en) | 1980-06-30 | 1980-06-30 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5715420A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5242862A (en) * | 1990-02-14 | 1993-09-07 | Nippondenso Co., Ltd. | Semiconductor device and method of manufacturing same |
| US5342793A (en) * | 1990-02-20 | 1994-08-30 | Sgs-Thomson Microelectronics, S.R.L. | Process for obtaining multi-layer metallization of the back of a semiconductor substrate |
| JP2004103763A (en) * | 2002-09-09 | 2004-04-02 | Fuji Electric Device Technology Co Ltd | Method for manufacturing semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5179563A (en) * | 1975-01-06 | 1976-07-10 | Hitachi Ltd | HANDOTAISOCHINOSEIZOHOHO |
-
1980
- 1980-06-30 JP JP9044780A patent/JPS5715420A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5179563A (en) * | 1975-01-06 | 1976-07-10 | Hitachi Ltd | HANDOTAISOCHINOSEIZOHOHO |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5242862A (en) * | 1990-02-14 | 1993-09-07 | Nippondenso Co., Ltd. | Semiconductor device and method of manufacturing same |
| US5663096A (en) * | 1990-02-14 | 1997-09-02 | Nippondenso Co., Ltd. | Method of manufacturing a vertical semiconductor device with ground surface providing a reduced ON resistance |
| US5689130A (en) * | 1990-02-14 | 1997-11-18 | Nippondenso Co., Ltd. | Vertical semiconductor device with ground surface providing a reduced ON resistance |
| US5994187A (en) * | 1990-02-14 | 1999-11-30 | Nippondenso Co., Ltd. | Method of manufacturing a vertical semiconductor device |
| US6498366B1 (en) | 1990-02-14 | 2002-12-24 | Denso Corporation | Semiconductor device that exhibits decreased contact resistance between substrate and drain electrode |
| US6649478B2 (en) | 1990-02-14 | 2003-11-18 | Denso Corporation | Semiconductor device and method of manufacturing same |
| US6903417B2 (en) | 1990-02-14 | 2005-06-07 | Denso Corporation | Power semiconductor device |
| US6949434B2 (en) | 1990-02-14 | 2005-09-27 | Denso Corporation | Method of manufacturing a vertical semiconductor device |
| US7064033B2 (en) | 1990-02-14 | 2006-06-20 | Denso Corporation | Semiconductor device and method of manufacturing same |
| US5342793A (en) * | 1990-02-20 | 1994-08-30 | Sgs-Thomson Microelectronics, S.R.L. | Process for obtaining multi-layer metallization of the back of a semiconductor substrate |
| JP2004103763A (en) * | 2002-09-09 | 2004-04-02 | Fuji Electric Device Technology Co Ltd | Method for manufacturing semiconductor device |
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