JPS57162183A - Stored status detecting device for storage cell - Google Patents

Stored status detecting device for storage cell

Info

Publication number
JPS57162183A
JPS57162183A JP4779981A JP4779981A JPS57162183A JP S57162183 A JPS57162183 A JP S57162183A JP 4779981 A JP4779981 A JP 4779981A JP 4779981 A JP4779981 A JP 4779981A JP S57162183 A JPS57162183 A JP S57162183A
Authority
JP
Japan
Prior art keywords
level
output
cell
discriminating
discriminating means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4779981A
Other languages
Japanese (ja)
Inventor
Satoru Suzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP4779981A priority Critical patent/JPS57162183A/en
Publication of JPS57162183A publication Critical patent/JPS57162183A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3422—Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To confirm the normality of an output from an executive control program read-only memory (EPROM) and prevent a microcomputer or the like from error operation by discriminating an output of a memory cell by two level discriminating means with different levels and detecting that the output level of the cell is included between two difference discriminating levels. CONSTITUTION:An EPROM1 is provided with a memory cell 2 whose output level is changed according to the time elapsed, a level discriminating means 6 which discriminates an output from the cell 2 by an level included in a anormal operation output level range and a level discriminating means 7 which discriminates the output from the cell 2 by a level included in the normal operation output level range and lower than the level of the level discriminating means 6. A detecting means 10 detects that the output from the cell 2 is included between 2 different discriminating levels by the outputs from the level discriminating means 6, 7, preventing a microcomputer or the like from error operation when the output of EPROM is used for the microcomputer.
JP4779981A 1981-03-30 1981-03-30 Stored status detecting device for storage cell Pending JPS57162183A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4779981A JPS57162183A (en) 1981-03-30 1981-03-30 Stored status detecting device for storage cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4779981A JPS57162183A (en) 1981-03-30 1981-03-30 Stored status detecting device for storage cell

Publications (1)

Publication Number Publication Date
JPS57162183A true JPS57162183A (en) 1982-10-05

Family

ID=12785412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4779981A Pending JPS57162183A (en) 1981-03-30 1981-03-30 Stored status detecting device for storage cell

Country Status (1)

Country Link
JP (1) JPS57162183A (en)

Similar Documents

Publication Publication Date Title
EP0385501A3 (en) Constant feed water device
EP0257099A4 (en) Device for detecting various errors in set values for injection molding machine.
JPS57162183A (en) Stored status detecting device for storage cell
JPS5354670A (en) Trouble detector for controller
JPS56107834A (en) Electric discharge machine
KR930023532A (en) Automatic Water Level Control Circuit and Method of Automatic Washing Machine
JPS55157022A (en) Output circuit for microcomputer
JPS57138098A (en) Mis-write preventing circuit in main power supply failure
JPS56144989A (en) Margin setter
JPS57182809A (en) Positioning controller
JPS5771018A (en) Positioning device
JPS52132860A (en) Checker for safety holder
JPS5792361A (en) Safety device for flash fixation
JPS5453781A (en) Remote supervisory controller
JPS5528637A (en) Automatic gain control unit
JPS57134706A (en) Program selection controller
JPS57776A (en) Display system for status
JPS5788600A (en) Memory testing device
JPS57146302A (en) Automatic controller
JPS56132607A (en) Fault detector
JPS5713516A (en) Process control checking circuit
JPS57111640A (en) Detection system for program running tracing
JPS5318149A (en) Controller for automatic door
JPS56114009A (en) Fault diagnosing method of digital controller
JPS5547544A (en) Automatic reinitiating circuit