JPS57183154A - Multispeed transmission system - Google Patents

Multispeed transmission system

Info

Publication number
JPS57183154A
JPS57183154A JP56067032A JP6703281A JPS57183154A JP S57183154 A JPS57183154 A JP S57183154A JP 56067032 A JP56067032 A JP 56067032A JP 6703281 A JP6703281 A JP 6703281A JP S57183154 A JPS57183154 A JP S57183154A
Authority
JP
Japan
Prior art keywords
transmission
processor
circuit
station
primary station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56067032A
Other languages
Japanese (ja)
Inventor
Shigeru Satake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56067032A priority Critical patent/JPS57183154A/en
Publication of JPS57183154A publication Critical patent/JPS57183154A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To connect secondary stations having various processing performance to the same circuit by providing a primary station with a means for varying a data transmission speed in accordance with the performance of the secondary station for a data transmission which follows an HDLC controlling procedure. CONSTITUTION:In an initial state, a primary station 1 and a secondary station 2 operate by a transmission clock having a basic speed and when a processor is enabled to operate in normal answer mode, a response signal UA is transmitted from the processor 21 to the primary station 1 through a transmitting buffer 23, a transmission circuit 22, and a circuit 7 and then stored in a receiving buffer 14 through a transmitting circuit 22. When a command RR is transmitted from a processor 11 to the secondary station 2, the processor 21 sends a response signal including a discrimination signal to the primary station 1. The primary station 1 stores the discrimination information in a prescribed area of a table 15 and supplies a speed controlling signal 17 having contents which corresponds to the discrimination information to a transmission controlling circuit 16 to indicate the switching of transmission clocks. The processor 21, on the other hand, indicates the switching of clocks by a transmission controlling circuit 25 after the transmission of said response signal I.
JP56067032A 1981-05-06 1981-05-06 Multispeed transmission system Pending JPS57183154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56067032A JPS57183154A (en) 1981-05-06 1981-05-06 Multispeed transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56067032A JPS57183154A (en) 1981-05-06 1981-05-06 Multispeed transmission system

Publications (1)

Publication Number Publication Date
JPS57183154A true JPS57183154A (en) 1982-11-11

Family

ID=13333123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56067032A Pending JPS57183154A (en) 1981-05-06 1981-05-06 Multispeed transmission system

Country Status (1)

Country Link
JP (1) JPS57183154A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61252736A (en) * 1985-04-30 1986-11-10 インターナショナル・ビジネス・マシーンズ・コーポレーション Method and apparatus for controlling modem circuit network
JPH0278343A (en) * 1988-06-20 1990-03-19 Hitachi Ltd Communication control system
WO2002060130A1 (en) * 2001-01-23 2002-08-01 Mitsubishi Denki Kabushiki Kaisha Data communication device and data communication method
JP2010004123A (en) * 2008-06-18 2010-01-07 Canon Inc Communication controller, communication control method, program and storage medium

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61252736A (en) * 1985-04-30 1986-11-10 インターナショナル・ビジネス・マシーンズ・コーポレーション Method and apparatus for controlling modem circuit network
JPH0278343A (en) * 1988-06-20 1990-03-19 Hitachi Ltd Communication control system
WO2002060130A1 (en) * 2001-01-23 2002-08-01 Mitsubishi Denki Kabushiki Kaisha Data communication device and data communication method
JP2010004123A (en) * 2008-06-18 2010-01-07 Canon Inc Communication controller, communication control method, program and storage medium

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