JPS5720075A - Display circuit for synchronous separation level of television signal - Google Patents

Display circuit for synchronous separation level of television signal

Info

Publication number
JPS5720075A
JPS5720075A JP9329280A JP9329280A JPS5720075A JP S5720075 A JPS5720075 A JP S5720075A JP 9329280 A JP9329280 A JP 9329280A JP 9329280 A JP9329280 A JP 9329280A JP S5720075 A JPS5720075 A JP S5720075A
Authority
JP
Japan
Prior art keywords
signal
slicing level
input
synchronizing
monitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9329280A
Other languages
Japanese (ja)
Other versions
JPS6246119B2 (en
Inventor
Yasutaka Kato
Hideo Sato
Yoshimoto Ito
Shigeki Tsuzaki
Masato Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK, Oki Electric Industry Co Ltd filed Critical Kokusai Denshin Denwa KK
Priority to JP9329280A priority Critical patent/JPS5720075A/en
Publication of JPS5720075A publication Critical patent/JPS5720075A/en
Publication of JPS6246119B2 publication Critical patent/JPS6246119B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00—Diagnosis, testing or measuring for television systems or their details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00—Diagnosis, testing or measuring for television systems or their details
    • H04N17/04—Diagnosis, testing or measuring for television systems or their details for receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • General Health & Medical Sciences (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

PURPOSE:To vary a slicing level corresponding to the disturbance of an input TV signal rapidly and accurately by alternating the input TV signal and slicing level synchronizing with the synchronizing signal of the TV signal and by superposing and displaying the TV signal and slicing level together by the output. CONSTITUTION:A TV signal having the peak of synchronism clamped and a sliced voltage signal from the +input of an IC3 are passed through an IC11 and an IC10 to obtain inverted signals of a voltage follower, which is outputted as slicing level monitoring output signal SL monitor signal through a buffer circuit IC12 switched by a change-over switch 18. With the switching gate signal of the switch 18, the waveform of a synchronously separated SYNC signal is shaped 15. For example, switching to the sliced voltage signal is made only in a period including the synchronizing signal period of the peak-clamped TV signal. Consequently, the SL monitor signal is as shown by the solid line, but when it is observed through a waveform monitor, parts shown by the solid line and the broken line are displayed simultaneously.
JP9329280A 1980-07-10 1980-07-10 Display circuit for synchronous separation level of television signal Granted JPS5720075A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9329280A JPS5720075A (en) 1980-07-10 1980-07-10 Display circuit for synchronous separation level of television signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9329280A JPS5720075A (en) 1980-07-10 1980-07-10 Display circuit for synchronous separation level of television signal

Publications (2)

Publication Number Publication Date
JPS5720075A true JPS5720075A (en) 1982-02-02
JPS6246119B2 JPS6246119B2 (en) 1987-09-30

Family

ID=14078305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9329280A Granted JPS5720075A (en) 1980-07-10 1980-07-10 Display circuit for synchronous separation level of television signal

Country Status (1)

Country Link
JP (1) JPS5720075A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58186270A (en) * 1982-04-23 1983-10-31 Victor Co Of Japan Ltd Synchronizing separation circuit
JPS60220273A (en) * 1984-03-28 1985-11-02 アメリカン・スタンダ−ド・インコ−ポレイテッド Sanitary single lever mixing valve assembly
JPH01284487A (en) * 1988-05-09 1989-11-15 Nippon Steel Corp Automatic recognition and control device for high-frequency electric welding state

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58186270A (en) * 1982-04-23 1983-10-31 Victor Co Of Japan Ltd Synchronizing separation circuit
JPS60220273A (en) * 1984-03-28 1985-11-02 アメリカン・スタンダ−ド・インコ−ポレイテッド Sanitary single lever mixing valve assembly
JPH01284487A (en) * 1988-05-09 1989-11-15 Nippon Steel Corp Automatic recognition and control device for high-frequency electric welding state

Also Published As

Publication number Publication date
JPS6246119B2 (en) 1987-09-30

Similar Documents

Publication Publication Date Title
JPS5526792A (en) Television screen display unit
MY105383A (en) Display locked timing signals for video processing.
KR900702736A (en) Intra-frame processing device of video input signal
JPS56168473A (en) Scanning system
SE8401626D0 (en) SYNCHRONIZATION INPUT FOR ALFANUMERIC PRESENTATION ON THE SCREEN OF A TELEVISION RECEIVER
JPS6482097A (en) Liquid crystal panel driver
JPS5449021A (en) Circuit system of picture display unit
JPS56119581A (en) Clamp circuit
KR890012483A (en) Video display device
JPS5746580A (en) Display device for composite video signal
JPS6489883A (en) Television receiver
JPS5665572A (en) Picture display unit for displaying composite picture signal as interlace television picture
JPS5444821A (en) Synchronization system of external synchronous monitor television
JPS57166792A (en) Separating system of multiple color signal
KR940008040B1 (en) Circuit for synthesizing image signal of video camera
JPS5631282A (en) Drop-out compensating unit
JPS5617583A (en) Television picture receiver
JPS54104730A (en) Ghost reducing unit
JPS6481593A (en) Codec for time base compression multiplex transmission
KR870002733A (en) TV signal processing circuit
JPS5717269A (en) Display device for information television at home
JPS5765065A (en) Television reciver
KR870005293A (en) CRT monitor screen size adjustment circuit of artificial vision system
JPS53132947A (en) Display unit of deflecting-circuit common-use type
JPS57183608A (en) False video signal generator using both ntsc and pal/ secam systems