JPS57201312A - Automatic gain controlling circuit - Google Patents

Automatic gain controlling circuit

Info

Publication number
JPS57201312A
JPS57201312A JP8612381A JP8612381A JPS57201312A JP S57201312 A JPS57201312 A JP S57201312A JP 8612381 A JP8612381 A JP 8612381A JP 8612381 A JP8612381 A JP 8612381A JP S57201312 A JPS57201312 A JP S57201312A
Authority
JP
Japan
Prior art keywords
signal
automatic gain
controlling circuit
circuit
equalizer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8612381A
Other languages
Japanese (ja)
Inventor
Toshitaka Tsuda
Takafumi Nakajo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8612381A priority Critical patent/JPS57201312A/en
Publication of JPS57201312A publication Critical patent/JPS57201312A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To improve the transmission efficiency, by reducing the returning time of the automatic gain control when the signal is interrupted. CONSTITUTION:An automatic gain controlling circuit 5 enlarges the time constant of the circuit of condenser C1, etc., which holds the peak value of an output signal (a) of an equalizer 2 by switching, connecting, etc., resistances R2 and R3 through a signal interruption detect signal (d) from a signal interruption detecting circuit 8. Therefore, even when the signal is interrupted, the peak value can be maintained at about the same level as the value just before the signal interruption, hence normal gain control of the equalizer 2 can immediately be started when the signal reaches again. Consequently, even when data are to be transmitted as a burst signal, data can be transmitted without adding any useless information to the leading head of the burst signal.
JP8612381A 1981-06-04 1981-06-04 Automatic gain controlling circuit Pending JPS57201312A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8612381A JPS57201312A (en) 1981-06-04 1981-06-04 Automatic gain controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8612381A JPS57201312A (en) 1981-06-04 1981-06-04 Automatic gain controlling circuit

Publications (1)

Publication Number Publication Date
JPS57201312A true JPS57201312A (en) 1982-12-09

Family

ID=13877920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8612381A Pending JPS57201312A (en) 1981-06-04 1981-06-04 Automatic gain controlling circuit

Country Status (1)

Country Link
JP (1) JPS57201312A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6014058A (en) * 1997-09-02 2000-01-11 Nec Corporation High-speed AGC circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6014058A (en) * 1997-09-02 2000-01-11 Nec Corporation High-speed AGC circuit

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