JPS57202157A - Packet exchanger - Google Patents

Packet exchanger

Info

Publication number
JPS57202157A
JPS57202157A JP8737981A JP8737981A JPS57202157A JP S57202157 A JPS57202157 A JP S57202157A JP 8737981 A JP8737981 A JP 8737981A JP 8737981 A JP8737981 A JP 8737981A JP S57202157 A JPS57202157 A JP S57202157A
Authority
JP
Japan
Prior art keywords
section
controlling
circuit
function
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8737981A
Other languages
Japanese (ja)
Inventor
Zenichi Yashiro
Kazuo Watanabe
Shigeru Ooyama
Fumiaki Ishino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP8737981A priority Critical patent/JPS57202157A/en
Publication of JPS57202157A publication Critical patent/JPS57202157A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To increase the processing ability of a central processing system with a low cost constitution, by including a function which has been performed with the software from the central processing system in a line control section. CONSTITUTION:A packet exchanger 1A consists of a main storage section 5, a central processing section 6, line control sections 7-1-7-n corresponding to lines l1-ln, and a bus control circuit 15 controlling the competition of a service processor 14 and a bus. The line control sections 7-1-7-n consist of an HDLC procedure processing circuit 8 which performs a function assembling a bit serial data from the lines l1-ln, a function decomposing characters into a bit serial data, and a high level data link control (HDLC) procedure processing circuit 8 which performs HDLC procedure processing, a microprocessor 9 controlling the operation of each section of the line controlling sections 7-1-7-n with a program incorporated in a packet processing ROM10, buffuer memory 11 and a DMA circuit 17.
JP8737981A 1981-06-05 1981-06-05 Packet exchanger Pending JPS57202157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8737981A JPS57202157A (en) 1981-06-05 1981-06-05 Packet exchanger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8737981A JPS57202157A (en) 1981-06-05 1981-06-05 Packet exchanger

Publications (1)

Publication Number Publication Date
JPS57202157A true JPS57202157A (en) 1982-12-10

Family

ID=13913256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8737981A Pending JPS57202157A (en) 1981-06-05 1981-06-05 Packet exchanger

Country Status (1)

Country Link
JP (1) JPS57202157A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4861004A (en) * 1971-12-01 1973-08-27
JPS5571339A (en) * 1978-11-22 1980-05-29 Fujitsu Ltd Packet transfer circuit system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4861004A (en) * 1971-12-01 1973-08-27
JPS5571339A (en) * 1978-11-22 1980-05-29 Fujitsu Ltd Packet transfer circuit system

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