JPS5723232A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5723232A
JPS5723232A JP9839980A JP9839980A JPS5723232A JP S5723232 A JPS5723232 A JP S5723232A JP 9839980 A JP9839980 A JP 9839980A JP 9839980 A JP9839980 A JP 9839980A JP S5723232 A JPS5723232 A JP S5723232A
Authority
JP
Japan
Prior art keywords
substrate
type layers
heat
irradiated
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9839980A
Other languages
Japanese (ja)
Inventor
Noriaki Sato
Tsutomu Ogawa
Takashi Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9839980A priority Critical patent/JPS5723232A/en
Publication of JPS5723232A publication Critical patent/JPS5723232A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To simplify annealing of the reverse conductive layer of a semiconductor device by a method wherein ion implantation is performed selectively in a substrate through an insulating film to provide the reverse conductive layer, and an infrared laser beam is irradiated from the back of the substrate to heat the insulating film. CONSTITUTION:Ion implantation is performed on the P type Si substrate 1 through the gate oxide film 3 making a gate electrode 5 as a mask to form N type layers 6, 7. Then CO2 laser beam of 10.6mum wave length is irradiated from the back of the substrate 1 to heat the oxide film 3 through the substrate, and the adjoining N type layers 6, 7 are annealed by heat conduction. By this constitution, because the substrate is not heated on the whole, rediffusion of impurity in the N type layers 6, 7 is not generated, channel length in accordance with the design can be obtained easily, and annealing process can be simplified. After then it is covered with traditional PSG, and when an opening is formed and an electrode is provided, the device having favorable characteristic can be obtained.
JP9839980A 1980-07-18 1980-07-18 Manufacture of semiconductor device Pending JPS5723232A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9839980A JPS5723232A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9839980A JPS5723232A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5723232A true JPS5723232A (en) 1982-02-06

Family

ID=14218751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9839980A Pending JPS5723232A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5723232A (en)

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