JPS574116A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPS574116A
JPS574116A JP7808180A JP7808180A JPS574116A JP S574116 A JPS574116 A JP S574116A JP 7808180 A JP7808180 A JP 7808180A JP 7808180 A JP7808180 A JP 7808180A JP S574116 A JPS574116 A JP S574116A
Authority
JP
Japan
Prior art keywords
layer
substrate
semiconductor layer
thin semiconductor
depletion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7808180A
Other languages
Japanese (ja)
Inventor
Takashi Mizutani
Masamichi Omori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP7808180A priority Critical patent/JPS574116A/en
Publication of JPS574116A publication Critical patent/JPS574116A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3421—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2911—Arsenides

Landscapes

  • Weting (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain easily a necessitated thin semiconductor layer when the thin semiconductor layer is to be formed on a substrate by a method wherein a thick semiconductor layer is adhered on the substrate at first, the surface layer thereof is converted into an oxide layer by an anodic oxidation treatment, and the surface layer is removed by etching. CONSTITUTION:The semiconductor layer 2 thicker than the desired thickness is made to grow on the substrate 1, and only the surface layer thereof is converted into the oxide layer 3 by the anodic oxidation treatment. The oxide layer 3 is removed with an etchant consisted of fluoric acid, and a thin semiconductor layer 2 having a transition layer 10 and a depletion layer 11 is remained on the substrate 1. After then the transition layer 10 is removed and at the same time the depletion layer 11 is also eliminated using an etchant being fitted to the semiconductor layer 2, and the desired thin semiconductor layer 2 is generated on the substrate 1. Accordingly because the transition layer and the depletion layer to be remained ordinally are removed, the semiconductor device having a favorable characteristic is enabled to obtain.
JP7808180A 1980-06-10 1980-06-10 Manufacture of semiconductor substrate Pending JPS574116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7808180A JPS574116A (en) 1980-06-10 1980-06-10 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7808180A JPS574116A (en) 1980-06-10 1980-06-10 Manufacture of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS574116A true JPS574116A (en) 1982-01-09

Family

ID=13651888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7808180A Pending JPS574116A (en) 1980-06-10 1980-06-10 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS574116A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4759952A (en) * 1984-01-26 1988-07-26 Learonal, Inc. Process for printed circuit board manufacture
US4847114A (en) * 1984-01-26 1989-07-11 Learonal, Inc. Preparation of printed circuit boards by selective metallization
CN115347079A (en) * 2022-08-19 2022-11-15 中国电子科技集团公司第四十四研究所 Manufacturing method of low-post-pulse silicon SPAD detector

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4759952A (en) * 1984-01-26 1988-07-26 Learonal, Inc. Process for printed circuit board manufacture
US4847114A (en) * 1984-01-26 1989-07-11 Learonal, Inc. Preparation of printed circuit boards by selective metallization
CN115347079A (en) * 2022-08-19 2022-11-15 中国电子科技集团公司第四十四研究所 Manufacturing method of low-post-pulse silicon SPAD detector

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