JPS5750135A - Inverter circuit - Google Patents
Inverter circuitInfo
- Publication number
- JPS5750135A JPS5750135A JP55124879A JP12487980A JPS5750135A JP S5750135 A JPS5750135 A JP S5750135A JP 55124879 A JP55124879 A JP 55124879A JP 12487980 A JP12487980 A JP 12487980A JP S5750135 A JPS5750135 A JP S5750135A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- inverter
- output
- transistor
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000003199 nucleic acid amplification method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
- H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
- H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To avoid the inverter circuit from being affected by the characteristic variance of threshold voltage and current amplification factor due to manufacturing fluetuation, by providing the 2nd load transistor in addition to a load transistor, in the 1st and 2nd inverters. CONSTITUTION:A load MOS transistor Q1 and a driver transistor Q2 are connected in series, and the drain of the Q1 is connected to a current Vcc and the source of the Q2 is connected to ground. The gate of the Q2 is connected to an input terminal VIN and the source of the Q1 is connected to the drain of the Q2 to be an output terminal Vout. The Q3, Q4 in a characteristic variance detecting circuit have similar connections as is the case with the Q1, Q2. The output terminal A1 of an output of the detection circuit is connected to the gate of a Q6 as the input of the inverter consisting of the Q5, Q6, and the output A2 of the inverter is inputted to the gate of the Q1, Q3 as a control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55124879A JPS5750135A (en) | 1980-09-09 | 1980-09-09 | Inverter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55124879A JPS5750135A (en) | 1980-09-09 | 1980-09-09 | Inverter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5750135A true JPS5750135A (en) | 1982-03-24 |
Family
ID=14896346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55124879A Pending JPS5750135A (en) | 1980-09-09 | 1980-09-09 | Inverter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5750135A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102624371A (en) * | 2011-01-25 | 2012-08-01 | 精工电子有限公司 | Output circuit, temperature switch ic, and battery pack |
-
1980
- 1980-09-09 JP JP55124879A patent/JPS5750135A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102624371A (en) * | 2011-01-25 | 2012-08-01 | 精工电子有限公司 | Output circuit, temperature switch ic, and battery pack |
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