JPS5760585A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5760585A
JPS5760585A JP55133993A JP13399380A JPS5760585A JP S5760585 A JPS5760585 A JP S5760585A JP 55133993 A JP55133993 A JP 55133993A JP 13399380 A JP13399380 A JP 13399380A JP S5760585 A JPS5760585 A JP S5760585A
Authority
JP
Japan
Prior art keywords
current
writing
curve
line
digit line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55133993A
Other languages
Japanese (ja)
Inventor
Manabu Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55133993A priority Critical patent/JPS5760585A/en
Publication of JPS5760585A publication Critical patent/JPS5760585A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To reduce the current and voltage of a digit line during the writing and to decrease the current consumption, by forming a load resistance of a digit line of a memory using an MISFET with a transistor having different load characteristic. CONSTITUTION:The load resistance is formed to a digit line D of a memory using an MISFET with the combinations among termination transistors (TR)Q7 and Q8 and depletion type FETQ9 and Q10 that content between the drains, gates and sources of the TRs Q7 and Q8. Thus the load characteristic curve 3 of the line D differs from the load characteristic curve 4 that excludes the FETQ9 and Q10. Accordingly the current and voltage corresponding to the intersection between the curve 3 and a current curve 2 flowing to a transfer gate Q1 or Q2 are applied to the line D in case the writing is carried out at a node A in a low level. As a result, the writing current consumption is decreased in comparison with the case where a single transistor is used for the load resistance.
JP55133993A 1980-09-26 1980-09-26 Memory device Pending JPS5760585A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55133993A JPS5760585A (en) 1980-09-26 1980-09-26 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55133993A JPS5760585A (en) 1980-09-26 1980-09-26 Memory device

Publications (1)

Publication Number Publication Date
JPS5760585A true JPS5760585A (en) 1982-04-12

Family

ID=15117872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55133993A Pending JPS5760585A (en) 1980-09-26 1980-09-26 Memory device

Country Status (1)

Country Link
JP (1) JPS5760585A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02294996A (en) * 1989-05-08 1990-12-05 Nec Ic Microcomput Syst Ltd Semiconductor storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02294996A (en) * 1989-05-08 1990-12-05 Nec Ic Microcomput Syst Ltd Semiconductor storage device

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