JPS5760729A - Pulse width modulating circuit - Google Patents

Pulse width modulating circuit

Info

Publication number
JPS5760729A
JPS5760729A JP55134305A JP13430580A JPS5760729A JP S5760729 A JPS5760729 A JP S5760729A JP 55134305 A JP55134305 A JP 55134305A JP 13430580 A JP13430580 A JP 13430580A JP S5760729 A JPS5760729 A JP S5760729A
Authority
JP
Japan
Prior art keywords
gamma
pulse
pulses
generation time
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55134305A
Other languages
Japanese (ja)
Inventor
Akio Sagawa
Masayoshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55134305A priority Critical patent/JPS5760729A/en
Publication of JPS5760729A publication Critical patent/JPS5760729A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number

Abstract

PURPOSE:To modulate a pulse width with high precision, by modulating the pulse width of a reference pulse digitally by the output difference between two frequency dividing circuits different in frequency division ratio. CONSTITUTION:When the generation period of a pulse CP of a reference pulse generating circuit 30 is denoted as gamma, the period of an output pulse CP1 of a 1/n frequency dividing circuit 40 becomes ngamma. Meanwhile, the period of an output pulse CP2 of a 1/(n+1) frequency dividing circuit 50 becomes (n+1)gamma. When output pulses CP1 and CP2 of circuits 40 and 50 are generated simultaneously, next divided pulses CP1 and CP2 are generated after ngamma seconds and (n+1)gamma seconds, respectively. Consequently, the difference of the generation time is gamma. The second generated pulses CP1 and CP2 have generation time difference 2gamma. Similarly, the m-th generated pulses have generation time difference mgamma, and thus, the generation time difference is increased by gamma for every generation.
JP55134305A 1980-09-29 1980-09-29 Pulse width modulating circuit Pending JPS5760729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55134305A JPS5760729A (en) 1980-09-29 1980-09-29 Pulse width modulating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55134305A JPS5760729A (en) 1980-09-29 1980-09-29 Pulse width modulating circuit

Publications (1)

Publication Number Publication Date
JPS5760729A true JPS5760729A (en) 1982-04-12

Family

ID=15125177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55134305A Pending JPS5760729A (en) 1980-09-29 1980-09-29 Pulse width modulating circuit

Country Status (1)

Country Link
JP (1) JPS5760729A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008100251A (en) * 2006-10-18 2008-05-01 Arai Seisakusho Co Ltd Flare tube expansion equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008100251A (en) * 2006-10-18 2008-05-01 Arai Seisakusho Co Ltd Flare tube expansion equipment

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