JPS5760737A - Pll frequency synthesizer - Google Patents

Pll frequency synthesizer

Info

Publication number
JPS5760737A
JPS5760737A JP55134434A JP13443480A JPS5760737A JP S5760737 A JPS5760737 A JP S5760737A JP 55134434 A JP55134434 A JP 55134434A JP 13443480 A JP13443480 A JP 13443480A JP S5760737 A JPS5760737 A JP S5760737A
Authority
JP
Japan
Prior art keywords
circuit
value
output impedance
pll
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55134434A
Other languages
Japanese (ja)
Inventor
Masami Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55134434A priority Critical patent/JPS5760737A/en
Publication of JPS5760737A publication Critical patent/JPS5760737A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
    • H03J5/0281—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer the digital values being held in an auxiliary non erasable memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To extend the set time of an N value to improve the following property of a PLL loop with simple constitution, by providing a means which raises the output impedance in the time of preset of changed N-value data to a program counter. CONSTITUTION:A PLL frequency synthesizer which forms a local osillation frequency fLOC is provided in a radio receiver, and a circuit which consists of a latch circuit 4 and a control circuit 5 and raises the output impedance of a phase detecting circuit 7 due to this synthesizer is connected to a program counter 3 which supplies a frequency division output Fi to the circuit 7. In a loop filter 8, a set value N held in the latch circuit 4 or the complementary value of N is taken in, and one pulse is outputted for every n-input signals FIN to form an FIN/N frequency division output Fi. The output impedance of the circuit 7 is raised by a control signal C while the N value is transferred from the control circuit to the latch circuit 4, thereby improving the following property of the PLL loop.
JP55134434A 1980-09-29 1980-09-29 Pll frequency synthesizer Pending JPS5760737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55134434A JPS5760737A (en) 1980-09-29 1980-09-29 Pll frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55134434A JPS5760737A (en) 1980-09-29 1980-09-29 Pll frequency synthesizer

Publications (1)

Publication Number Publication Date
JPS5760737A true JPS5760737A (en) 1982-04-12

Family

ID=15128276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55134434A Pending JPS5760737A (en) 1980-09-29 1980-09-29 Pll frequency synthesizer

Country Status (1)

Country Link
JP (1) JPS5760737A (en)

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