JPS5771032A - Priority controlling circuit - Google Patents

Priority controlling circuit

Info

Publication number
JPS5771032A
JPS5771032A JP55146894A JP14689480A JPS5771032A JP S5771032 A JPS5771032 A JP S5771032A JP 55146894 A JP55146894 A JP 55146894A JP 14689480 A JP14689480 A JP 14689480A JP S5771032 A JPS5771032 A JP S5771032A
Authority
JP
Japan
Prior art keywords
priority
requests
register
answered
output information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55146894A
Other languages
Japanese (ja)
Other versions
JPS619655B2 (en
Inventor
Katsumi Hashimoto
Shintarou Azami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55146894A priority Critical patent/JPS5771032A/en
Publication of JPS5771032A publication Critical patent/JPS5771032A/en
Publication of JPS619655B2 publication Critical patent/JPS619655B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To improve the efficiency of the resource of the entire system by rotating priority leveles according to the condition of the generation of a request and by making answers in constant order. CONSTITUTION:The output information of a register 5 stored with priority controlling information is supplied to a priority-level determining circuit to change priority levels by the output information of the register 5. Then, top priority is given to an input having priority following that of the last answered request indicated by the output information of the register 5 and when all requests are handled, priority controlling information is outputted in predetermined priority order. Therefore, when requests converge, even requests having lower priority levels are answered. In addition, when all requests are answered, predetermined priority order is set, so specific important request is not given priority to others.
JP55146894A 1980-10-22 1980-10-22 Priority controlling circuit Granted JPS5771032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55146894A JPS5771032A (en) 1980-10-22 1980-10-22 Priority controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55146894A JPS5771032A (en) 1980-10-22 1980-10-22 Priority controlling circuit

Publications (2)

Publication Number Publication Date
JPS5771032A true JPS5771032A (en) 1982-05-01
JPS619655B2 JPS619655B2 (en) 1986-03-25

Family

ID=15417973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55146894A Granted JPS5771032A (en) 1980-10-22 1980-10-22 Priority controlling circuit

Country Status (1)

Country Link
JP (1) JPS5771032A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59129995A (en) * 1983-01-14 1984-07-26 Nec Corp Storage device
JPH01130248A (en) * 1987-11-06 1989-05-23 Honeywell Bull Inc Lockout prevention circuit
JPH01270161A (en) * 1988-04-22 1989-10-27 Hitachi Ltd Common bus control system
JPH03128542A (en) * 1989-10-13 1991-05-31 Toyota Motor Corp Communication control equipment in vehicle
JPH03194639A (en) * 1989-12-25 1991-08-26 Nec Eng Ltd Parallel priority judgement device
JP2001125827A (en) * 1999-08-31 2001-05-11 Koninkl Philips Electronics Nv Access to shared resources
JP2009529564A (en) * 2006-03-10 2009-08-20 ビーエーエスエフ ソシエタス・ヨーロピア Process for producing benzophenone imines

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59129995A (en) * 1983-01-14 1984-07-26 Nec Corp Storage device
JPH01130248A (en) * 1987-11-06 1989-05-23 Honeywell Bull Inc Lockout prevention circuit
JPH01270161A (en) * 1988-04-22 1989-10-27 Hitachi Ltd Common bus control system
JPH03128542A (en) * 1989-10-13 1991-05-31 Toyota Motor Corp Communication control equipment in vehicle
JPH03194639A (en) * 1989-12-25 1991-08-26 Nec Eng Ltd Parallel priority judgement device
JP2001125827A (en) * 1999-08-31 2001-05-11 Koninkl Philips Electronics Nv Access to shared resources
JP2009529564A (en) * 2006-03-10 2009-08-20 ビーエーエスエフ ソシエタス・ヨーロピア Process for producing benzophenone imines

Also Published As

Publication number Publication date
JPS619655B2 (en) 1986-03-25

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