JPS5771598A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5771598A JPS5771598A JP55147616A JP14761680A JPS5771598A JP S5771598 A JPS5771598 A JP S5771598A JP 55147616 A JP55147616 A JP 55147616A JP 14761680 A JP14761680 A JP 14761680A JP S5771598 A JPS5771598 A JP S5771598A
- Authority
- JP
- Japan
- Prior art keywords
- memory cell
- lines
- intersection point
- cell exists
- faulty memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To process as the same variety irrespective of the position of a faulty memory cell, by fixing a level of an address input, in hardware mode, by which a memory array is divided into two in accordance with a position where the faulty memory cell exists. CONSTITUTION:As a result of inspection, for instance, when it becomes clear that a faulty memory cell exists on an intersection point of column lines R0-R127 and row lines C0C63, an address bonding pad 12 is connected to an electric power supply bonding pad. On the contrary, when a faulty memory cell exists on an intersection point of the column lines R0-R127 and row lines C64-C127, the pad 12 is connected to a ground bonding pad. According to such a constitution, as for a memory device in which faulty memory cell exists on the row lines C0-C63, the uppermost bit AD13 of a row address buffer 3 always becomes high, therefore, only a memory cell on the intersection point of the lines R0-R127 and C64-C127 becomes significant. On the other hand, as for a memory device in which a faulty memory cell exists on the intersection point of the lines R0-R127 and C64-C127, only 1/2 becomes significant in the same way.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147616A JPS5771598A (en) | 1980-10-23 | 1980-10-23 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147616A JPS5771598A (en) | 1980-10-23 | 1980-10-23 | Semiconductor memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5771598A true JPS5771598A (en) | 1982-05-04 |
Family
ID=15434345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55147616A Pending JPS5771598A (en) | 1980-10-23 | 1980-10-23 | Semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5771598A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS598199A (en) * | 1982-07-02 | 1984-01-17 | Mitsubishi Electric Corp | Semiconductor storage device |
| JPH01223699A (en) * | 1988-03-01 | 1989-09-06 | Toshiba Corp | Memory integrated circuit |
| JPH04285799A (en) * | 1991-03-14 | 1992-10-09 | Fujitsu Ltd | Semiconductor memory device |
-
1980
- 1980-10-23 JP JP55147616A patent/JPS5771598A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS598199A (en) * | 1982-07-02 | 1984-01-17 | Mitsubishi Electric Corp | Semiconductor storage device |
| JPH01223699A (en) * | 1988-03-01 | 1989-09-06 | Toshiba Corp | Memory integrated circuit |
| JPH04285799A (en) * | 1991-03-14 | 1992-10-09 | Fujitsu Ltd | Semiconductor memory device |
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