JPS5772362A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5772362A
JPS5772362A JP14876780A JP14876780A JPS5772362A JP S5772362 A JPS5772362 A JP S5772362A JP 14876780 A JP14876780 A JP 14876780A JP 14876780 A JP14876780 A JP 14876780A JP S5772362 A JPS5772362 A JP S5772362A
Authority
JP
Japan
Prior art keywords
circuits
managing information
internal
circuit
product managing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14876780A
Other languages
Japanese (ja)
Other versions
JPS6333301B2 (en
Inventor
Fumitaka Chiba
Ichiro Miyazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14876780A priority Critical patent/JPS5772362A/en
Publication of JPS5772362A publication Critical patent/JPS5772362A/en
Publication of JPS6333301B2 publication Critical patent/JPS6333301B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22—Means for limiting or controlling the pin/gate ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To manage products easily by mounting a product managing information circuit and a switch controlling wire managing the circuit between an internal circuit and a pin. CONSTITUTION:The circuits 10-15 building in both product managing information and switches are mounted among the pins 1-3 and the internal circuits 16-18. Switch circuits 7-9 are fitted which change over the internal circuits 16-18 and the product managing information circuits 10-15. The product managing information circuits 10-15 are prepared for the internal circuits 16-18 by plural number, and controlled by means of the controlling wires 4-6. The pins 1-3 function as product managing information signal modes or serve as internal circuit signal modes by applying signals to the controlling wires 4-6. Accordingly, a wafer and a pellet can easily be managed even when a multikind of products are formed to one wafer.
JP14876780A 1980-10-23 1980-10-23 Semiconductor device Granted JPS5772362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14876780A JPS5772362A (en) 1980-10-23 1980-10-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14876780A JPS5772362A (en) 1980-10-23 1980-10-23 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5772362A true JPS5772362A (en) 1982-05-06
JPS6333301B2 JPS6333301B2 (en) 1988-07-05

Family

ID=15460190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14876780A Granted JPS5772362A (en) 1980-10-23 1980-10-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5772362A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583256A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Lsi chip
WO1986004433A1 (en) 1985-01-22 1986-07-31 Sony Corporation Memory device
JPS61199655A (en) * 1985-03-01 1986-09-04 Nec Corp semiconductor equipment
US5083181A (en) * 1987-11-27 1992-01-21 Hitachi, Ltd. Semiconductor integrated circuit device and wiring method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583256A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Lsi chip
WO1986004433A1 (en) 1985-01-22 1986-07-31 Sony Corporation Memory device
JPS61199655A (en) * 1985-03-01 1986-09-04 Nec Corp semiconductor equipment
US5083181A (en) * 1987-11-27 1992-01-21 Hitachi, Ltd. Semiconductor integrated circuit device and wiring method thereof

Also Published As

Publication number Publication date
JPS6333301B2 (en) 1988-07-05

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