JPS5773435A - Channel buffer control system - Google Patents
Channel buffer control systemInfo
- Publication number
- JPS5773435A JPS5773435A JP14834080A JP14834080A JPS5773435A JP S5773435 A JPS5773435 A JP S5773435A JP 14834080 A JP14834080 A JP 14834080A JP 14834080 A JP14834080 A JP 14834080A JP S5773435 A JPS5773435 A JP S5773435A
- Authority
- JP
- Japan
- Prior art keywords
- data
- block
- buffer
- data transfer
- prefetched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To prevent the occurrence of overrun in the data transfer of a low-rank channel, by carrying out the concentrated prefetch of data in division into the high and low block numbers in priority for a channel having a large amunt of data buffer. CONSTITUTION:A data transfer request produced at a data transfer request producing circuit 7 is sent to a data request reception control circuit 4 to be accepted in the prescribed priority. Thus only for the block number having a high degree of emergency, the data are prefetched concentrically to a data buffer 9 from a main storage 1 and via a data transfer control circuit 5. For other blocks, the data are prefetched after a block is transferred to an input/output device 10 from the buffer 9. Accordingly, the data is read to the block from the storage 1 to continue the proces every time the data of a block is transmitted to the input/output device from the buffer 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14834080A JPS5773435A (en) | 1980-10-24 | 1980-10-24 | Channel buffer control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14834080A JPS5773435A (en) | 1980-10-24 | 1980-10-24 | Channel buffer control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5773435A true JPS5773435A (en) | 1982-05-08 |
Family
ID=15450574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14834080A Pending JPS5773435A (en) | 1980-10-24 | 1980-10-24 | Channel buffer control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5773435A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1468203B2 (en) † | 2002-01-14 | 2011-10-12 | Alcon Components Limited | Cooling arrangement for brake caliper |
-
1980
- 1980-10-24 JP JP14834080A patent/JPS5773435A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1468203B2 (en) † | 2002-01-14 | 2011-10-12 | Alcon Components Limited | Cooling arrangement for brake caliper |
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