JPS5773679A - Frequency discriminating circuit - Google Patents
Frequency discriminating circuitInfo
- Publication number
- JPS5773679A JPS5773679A JP55150096A JP15009680A JPS5773679A JP S5773679 A JPS5773679 A JP S5773679A JP 55150096 A JP55150096 A JP 55150096A JP 15009680 A JP15009680 A JP 15009680A JP S5773679 A JPS5773679 A JP S5773679A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- signal
- period
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003111 delayed effect Effects 0.000 abstract 1
- 230000000630 rising effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/005—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing phase or frequency of 2 mutually independent oscillations in demodulators)
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Control Of Ac Motors In General (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To remove the fundamental frequency component of an input signal from an error voltage completely by obtaining the error voltage by adding an output, obtained by discriminating an input signal in every period of a doubled signal, and an output one period delayed behing the former output together. CONSTITUTION:A sine-wave signal A supplied from a terminal 101 is shaped by a limiter amplifier 103 into a rectangular-wave signal P, which is inputted to a pulse generator 104 to output a pulse Q at rising and breaking parts of the signal P. Those pulses Q are inputted to a discriminating circuit 111 through a delay circuit 110 to discriminate its period error in every period of input pulses Q'. Then, the output E1 of the discriminating circuit 11 is inputted to a sample holding circuit 112 to be sampled and held by the pulses Q, and the output E1 of the discriminating circuit 111 and the output E2 of the sample holding circuit 112 are added together by an adding circuit 113. As a result, fundamental wave components leaking into the outpurs E1 and E2 are out of phase each other, so a discrimination output E0 from which the fundamental wave is removed completely is obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55150096A JPS5773679A (en) | 1980-10-28 | 1980-10-28 | Frequency discriminating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55150096A JPS5773679A (en) | 1980-10-28 | 1980-10-28 | Frequency discriminating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5773679A true JPS5773679A (en) | 1982-05-08 |
| JPS6129673B2 JPS6129673B2 (en) | 1986-07-08 |
Family
ID=15489418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55150096A Granted JPS5773679A (en) | 1980-10-28 | 1980-10-28 | Frequency discriminating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5773679A (en) |
-
1980
- 1980-10-28 JP JP55150096A patent/JPS5773679A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6129673B2 (en) | 1986-07-08 |
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