JPS5776915A - Logical circuit for trigger control - Google Patents

Logical circuit for trigger control

Info

Publication number
JPS5776915A
JPS5776915A JP55151469A JP15146980A JPS5776915A JP S5776915 A JPS5776915 A JP S5776915A JP 55151469 A JP55151469 A JP 55151469A JP 15146980 A JP15146980 A JP 15146980A JP S5776915 A JPS5776915 A JP S5776915A
Authority
JP
Japan
Prior art keywords
trigger signal
output
input
inverting operation
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55151469A
Other languages
Japanese (ja)
Inventor
Takafumi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP55151469A priority Critical patent/JPS5776915A/en
Publication of JPS5776915A publication Critical patent/JPS5776915A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits

Landscapes

  • Logic Circuits (AREA)

Abstract

PURPOSE:To execute inverting operation surely, by adding the information of unfinished inverting operation of a flip-flop circuit to a trigger signal generating means and widening the pulse width of a trigger signal. CONSTITUTION:A trigger signal 7 is formed 103 by an output 5 of a D type flip- flop 101 taking an input signal 1 and a clock signal 2 as input and an inverting clock 6. The trigger signal 7 triggers an FF105 via an AND gate 104. On the other hand, an output 8 of the AND gate 104 is applied to a suppression input terminal of an NAND gate 300 with suppression type input terminal, and since and output 10 of the NAND gate 300 is kept to L level until the inverting operation of an FF105 is finished, the pulse width of the trigger signal 7 is widened. When the inverting operation of the FF105 is finished, the output of the NAND gate 300 is at H level, and the trigger input of a flip-flop 105 is absent.
JP55151469A 1980-10-30 1980-10-30 Logical circuit for trigger control Pending JPS5776915A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55151469A JPS5776915A (en) 1980-10-30 1980-10-30 Logical circuit for trigger control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55151469A JPS5776915A (en) 1980-10-30 1980-10-30 Logical circuit for trigger control

Publications (1)

Publication Number Publication Date
JPS5776915A true JPS5776915A (en) 1982-05-14

Family

ID=15519199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55151469A Pending JPS5776915A (en) 1980-10-30 1980-10-30 Logical circuit for trigger control

Country Status (1)

Country Link
JP (1) JPS5776915A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4854571A (en) * 1986-03-12 1989-08-08 Canon Kabushiki Kaisha Sheet sorting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4854571A (en) * 1986-03-12 1989-08-08 Canon Kabushiki Kaisha Sheet sorting device

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