JPS5777909A - Check point processing of rally meter - Google Patents
Check point processing of rally meterInfo
- Publication number
- JPS5777909A JPS5777909A JP15446680A JP15446680A JPS5777909A JP S5777909 A JPS5777909 A JP S5777909A JP 15446680 A JP15446680 A JP 15446680A JP 15446680 A JP15446680 A JP 15446680A JP S5777909 A JPS5777909 A JP S5777909A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- error time
- switch
- check point
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C22/00—Measuring distance traversed on the ground by vehicles, persons, animals or other moving solid bodies, e.g. using odometers, using pedometers
- G01C22/02—Measuring distance traversed on the ground by vehicles, persons, animals or other moving solid bodies, e.g. using odometers, using pedometers by conversion into electric waveforms and subsequent integration, e.g. using tachometer generator
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Measurement Of Distances Traversed On The Ground (AREA)
- Navigation (AREA)
Abstract
PURPOSE:To achieve an easy and accurate processing with such an arrangement that the previous error time is memorized into a data memory by first operation of a check point switch and the error time stored is cleared by the second operation of the switch to allow the calculation of new error time. CONSTITUTION:When a check point switch 1 is turned on, a signal Q is transmitted to a data lutching circuits 10 and 15 and a memory 24 by way of an inverter 3 and a D type FF4. The circuit 10 latches and transmits a running tange of a trip counter 9 to an indicator 11. The circuit 15 makes the output of a clock counter 14 indicated on an indicator 16. The memory 24 has the error time displayed 27 from an subtractor 23. The output Q of the FF4 clears the memory 19. A designated speed V is set with a switch 2. Then, when the switch 1 is turned on, the memory 24 is cleared through monostable multivibrator 7 and an inverter 8. The output Q allows new error time to be memorized in the memory through dividers 20 and 22 and the subtractor 23 and transmitted to the display 27. This enables easy and accurate processing of check points.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15446680A JPS5777909A (en) | 1980-10-31 | 1980-10-31 | Check point processing of rally meter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15446680A JPS5777909A (en) | 1980-10-31 | 1980-10-31 | Check point processing of rally meter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5777909A true JPS5777909A (en) | 1982-05-15 |
| JPS6161601B2 JPS6161601B2 (en) | 1986-12-26 |
Family
ID=15584853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15446680A Granted JPS5777909A (en) | 1980-10-31 | 1980-10-31 | Check point processing of rally meter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5777909A (en) |
-
1980
- 1980-10-31 JP JP15446680A patent/JPS5777909A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6161601B2 (en) | 1986-12-26 |
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