JPS5779640A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5779640A JPS5779640A JP55156142A JP15614280A JPS5779640A JP S5779640 A JPS5779640 A JP S5779640A JP 55156142 A JP55156142 A JP 55156142A JP 15614280 A JP15614280 A JP 15614280A JP S5779640 A JPS5779640 A JP S5779640A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- polycrystalline
- film
- si3n4
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
Landscapes
- Local Oxidation Of Silicon (AREA)
- Drying Of Semiconductors (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To enable to obtain a semiconductor substrate having few generation of defect improving the element isolation technique by a method wherein a material layer having high oxidation speed provided on the semiconductor substrate interposing an oxide film and an accumulated body of Si3N4 between them is oxidized selectively, and a part of the remaining material layer is removed. CONSTITUTION:After the SiO2 film 2, the Si3N4 film 3 and the polycrystalline Si layer 4 are accumulated in order on the Si substrate 1, selective etching is performed utilizing an Si nitride pattern to form thick silicon oxide films 7, a part of the remained polycrystalline Si layer is removed, and still remaining Si layers 4' are oxidized again. Accordingly controllng of finishing point of oxidation is unnecessitated, and because influence to the substrate is reduced, generation of stress is prevented, and moreover formation of element in minute type can be attained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156142A JPS5779640A (en) | 1980-11-06 | 1980-11-06 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156142A JPS5779640A (en) | 1980-11-06 | 1980-11-06 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5779640A true JPS5779640A (en) | 1982-05-18 |
| JPS628028B2 JPS628028B2 (en) | 1987-02-20 |
Family
ID=15621235
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55156142A Granted JPS5779640A (en) | 1980-11-06 | 1980-11-06 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5779640A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6222452A (en) * | 1985-07-22 | 1987-01-30 | Mitsubishi Electric Corp | Semiconductor device |
| US4818235A (en) * | 1987-02-10 | 1989-04-04 | Industry Technology Research Institute | Isolation structures for integrated circuits |
| JPH01132140A (en) * | 1987-08-19 | 1989-05-24 | Agency Of Ind Science & Technol | Formation of pattern |
-
1980
- 1980-11-06 JP JP55156142A patent/JPS5779640A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6222452A (en) * | 1985-07-22 | 1987-01-30 | Mitsubishi Electric Corp | Semiconductor device |
| US4818235A (en) * | 1987-02-10 | 1989-04-04 | Industry Technology Research Institute | Isolation structures for integrated circuits |
| JPH01132140A (en) * | 1987-08-19 | 1989-05-24 | Agency Of Ind Science & Technol | Formation of pattern |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS628028B2 (en) | 1987-02-20 |
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