JPS5779780A - Binary circuit - Google Patents

Binary circuit

Info

Publication number
JPS5779780A
JPS5779780A JP55155074A JP15507480A JPS5779780A JP S5779780 A JPS5779780 A JP S5779780A JP 55155074 A JP55155074 A JP 55155074A JP 15507480 A JP15507480 A JP 15507480A JP S5779780 A JPS5779780 A JP S5779780A
Authority
JP
Japan
Prior art keywords
signal
output
circuit
accurate binary
failures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55155074A
Other languages
Japanese (ja)
Inventor
Kunio Ichikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP55155074A priority Critical patent/JPS5779780A/en
Publication of JPS5779780A publication Critical patent/JPS5779780A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/08Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Image Input (AREA)
  • Closed-Circuit Television Systems (AREA)

Abstract

PURPOSE:To measure the number of failures of an object to be inspected without an error, by counting a pickup signal of a TV camera after making the signal into accurate binary code via a circuit using a delay circuit, attenuator, AND circuit, and SR type FF etc. as shown in figure. CONSTITUTION:An input signal (a) with a failure a' in an object to be inspected for example, is compared with a signal b delayed at a DAT and a signal c attenuated at an ATT at a COM 1 to obtain a signal d producing an output when the signal c is greater than the signal b. Similarly, an FF is set with a logical product output between a signal f obtained through the comparison of the signal b and a reference voltage e and the inverted output of the signal d and the FF is reset with the inverting output of the signal f. The logical product between an output g and the signal d is an accurate binary signal h. When this is directly applied to a counter COU, the number of failures is counted and the area is counted by using a pulse train i. Thus, through more accurate binary coding a than a conventional floating level system, an effective count means without error is obtained.
JP55155074A 1980-11-04 1980-11-04 Binary circuit Pending JPS5779780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155074A JPS5779780A (en) 1980-11-04 1980-11-04 Binary circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155074A JPS5779780A (en) 1980-11-04 1980-11-04 Binary circuit

Publications (1)

Publication Number Publication Date
JPS5779780A true JPS5779780A (en) 1982-05-19

Family

ID=15598078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155074A Pending JPS5779780A (en) 1980-11-04 1980-11-04 Binary circuit

Country Status (1)

Country Link
JP (1) JPS5779780A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511542A (en) * 1974-05-24 1976-01-08 Ooto Meeku Atsupu Ab

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511542A (en) * 1974-05-24 1976-01-08 Ooto Meeku Atsupu Ab

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