JPS5783836A - Check system for data transferring error - Google Patents

Check system for data transferring error

Info

Publication number
JPS5783836A
JPS5783836A JP55160267A JP16026780A JPS5783836A JP S5783836 A JPS5783836 A JP S5783836A JP 55160267 A JP55160267 A JP 55160267A JP 16026780 A JP16026780 A JP 16026780A JP S5783836 A JPS5783836 A JP S5783836A
Authority
JP
Japan
Prior art keywords
input
data transfer
counters
data
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55160267A
Other languages
Japanese (ja)
Inventor
Joji Kikuchi
Toshiyuki Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55160267A priority Critical patent/JPS5783836A/en
Publication of JPS5783836A publication Critical patent/JPS5783836A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To ensure the data transfer, by checking the data transfer quantity between an input/output controller and input/output devices double by the input/ output controller as well as input/output devices. CONSTITUTION:An input/output controller 1 and an input/output device 2 are provided with counters 12 and 16 which hold the data transfer quantity, respectively, and the first data in transfer data is held in counters 12 and 26, and contents of counters 12 and 26 are counted down by the following data transfer quantity to check double the data transfer quantity in the controller 1 as well as the device 2; and if values of counters 12 and 26 become 0 together, the transfer is terminated normally. If they do not coincide with 0, the error is reported by the check end of an in-tag (i).
JP55160267A 1980-11-14 1980-11-14 Check system for data transferring error Pending JPS5783836A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55160267A JPS5783836A (en) 1980-11-14 1980-11-14 Check system for data transferring error

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55160267A JPS5783836A (en) 1980-11-14 1980-11-14 Check system for data transferring error

Publications (1)

Publication Number Publication Date
JPS5783836A true JPS5783836A (en) 1982-05-25

Family

ID=15711297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55160267A Pending JPS5783836A (en) 1980-11-14 1980-11-14 Check system for data transferring error

Country Status (1)

Country Link
JP (1) JPS5783836A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187356A (en) * 1987-01-30 1988-08-02 Hitachi Ltd Data transfer control method
US6651127B2 (en) * 1999-06-03 2003-11-18 Micron Technology, Inc. Method of detecting termination of a bus transfer operation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187356A (en) * 1987-01-30 1988-08-02 Hitachi Ltd Data transfer control method
US6651127B2 (en) * 1999-06-03 2003-11-18 Micron Technology, Inc. Method of detecting termination of a bus transfer operation

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