JPS5786903A - Sequence control system - Google Patents

Sequence control system

Info

Publication number
JPS5786903A
JPS5786903A JP16302080A JP16302080A JPS5786903A JP S5786903 A JPS5786903 A JP S5786903A JP 16302080 A JP16302080 A JP 16302080A JP 16302080 A JP16302080 A JP 16302080A JP S5786903 A JPS5786903 A JP S5786903A
Authority
JP
Japan
Prior art keywords
control
contents
sequence control
mpu4
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16302080A
Other languages
Japanese (ja)
Inventor
Norio Onodera
Masabumi Morihara
Takatoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16302080A priority Critical patent/JPS5786903A/en
Publication of JPS5786903A publication Critical patent/JPS5786903A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To adapt the transmitting processing for control codes from a microprocessor to high-speed control, by utilizing the intermittent timing of sequence control for the control of a magnetic disk device, etc. CONSTITUTION:A microprocessor MPU4 checks the contents of a state register 8 and, at the same time, supplies control codes to a first-in first-out memory 6 successively. At the timing that a sequencer 7 requires, the contents of the memory 6 are decoded and control is performed through a control register 10. Further, a timer counter 9 is set upon occasion and state information is set in the state register 8 to be reported to the MPU4.
JP16302080A 1980-11-19 1980-11-19 Sequence control system Pending JPS5786903A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16302080A JPS5786903A (en) 1980-11-19 1980-11-19 Sequence control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16302080A JPS5786903A (en) 1980-11-19 1980-11-19 Sequence control system

Publications (1)

Publication Number Publication Date
JPS5786903A true JPS5786903A (en) 1982-05-31

Family

ID=15765661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16302080A Pending JPS5786903A (en) 1980-11-19 1980-11-19 Sequence control system

Country Status (1)

Country Link
JP (1) JPS5786903A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02181802A (en) * 1989-01-06 1990-07-16 Iwaki Denshi Kk Composite processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02181802A (en) * 1989-01-06 1990-07-16 Iwaki Denshi Kk Composite processor

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