JPS578848A - Microprogram control circuit - Google Patents

Microprogram control circuit

Info

Publication number
JPS578848A
JPS578848A JP8304880A JP8304880A JPS578848A JP S578848 A JPS578848 A JP S578848A JP 8304880 A JP8304880 A JP 8304880A JP 8304880 A JP8304880 A JP 8304880A JP S578848 A JPS578848 A JP S578848A
Authority
JP
Japan
Prior art keywords
beginning
counter
program execution
contents
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8304880A
Other languages
Japanese (ja)
Inventor
Yoichi Wakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP8304880A priority Critical patent/JPS578848A/en
Publication of JPS578848A publication Critical patent/JPS578848A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/223—Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To prevent a circuit from malfunctioning in the beginning of program execution, by inhibiting an instruction decoder from operating only in the beginning of program execution. CONSTITUTION:As a program counter 107 is initialized by a program initializing circuit 106, microinstructions are read out from prescribed addresses of an ROM108. The contents of an instruction register 109, however, are still unstable until a prescribed address of the ROM is specified by the counter 107 and the microinstruction is read out. At this time, if the register 109 contains an instruction code modifying the contents of the counter 107, the initialized contents of the counter 107 are destroyed. To prevent the malfunction like this in the beginning of program execution, the operation of an instruction decoder 110 is inhibited only in the beginning of program execution.
JP8304880A 1980-06-19 1980-06-19 Microprogram control circuit Pending JPS578848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8304880A JPS578848A (en) 1980-06-19 1980-06-19 Microprogram control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8304880A JPS578848A (en) 1980-06-19 1980-06-19 Microprogram control circuit

Publications (1)

Publication Number Publication Date
JPS578848A true JPS578848A (en) 1982-01-18

Family

ID=13791307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8304880A Pending JPS578848A (en) 1980-06-19 1980-06-19 Microprogram control circuit

Country Status (1)

Country Link
JP (1) JPS578848A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0441619A (en) * 1990-06-07 1992-02-12 Nippon Steel Corp Production of resistance welded tube excellent in toughness at low temperature
JPH07113122A (en) * 1993-10-15 1995-05-02 Sumitomo Metal Ind Ltd Method for manufacturing hot-dip galvanized ERW pipe

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5180137A (en) * 1975-01-09 1976-07-13 Matsushita Electric Industrial Co Ltd Shorisochino gokidoboshitsukitanmatsusochi
JPS51110219A (en) * 1975-03-24 1976-09-29 Sharp Kk OOTOKURIASOCHI
JPS5384418A (en) * 1976-12-29 1978-07-25 Fujitsu Ltd System rising system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5180137A (en) * 1975-01-09 1976-07-13 Matsushita Electric Industrial Co Ltd Shorisochino gokidoboshitsukitanmatsusochi
JPS51110219A (en) * 1975-03-24 1976-09-29 Sharp Kk OOTOKURIASOCHI
JPS5384418A (en) * 1976-12-29 1978-07-25 Fujitsu Ltd System rising system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0441619A (en) * 1990-06-07 1992-02-12 Nippon Steel Corp Production of resistance welded tube excellent in toughness at low temperature
JPH07113122A (en) * 1993-10-15 1995-05-02 Sumitomo Metal Ind Ltd Method for manufacturing hot-dip galvanized ERW pipe

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