JPS578988A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS578988A
JPS578988A JP8242180A JP8242180A JPS578988A JP S578988 A JPS578988 A JP S578988A JP 8242180 A JP8242180 A JP 8242180A JP 8242180 A JP8242180 A JP 8242180A JP S578988 A JPS578988 A JP S578988A
Authority
JP
Japan
Prior art keywords
output
circuit
data
node
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8242180A
Other languages
Japanese (ja)
Other versions
JPS6118836B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8242180A priority Critical patent/JPS578988A/en
Publication of JPS578988A publication Critical patent/JPS578988A/en
Publication of JPS6118836B2 publication Critical patent/JPS6118836B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To prevent the malfunction, etc., of a circuit connectd to an output circuit by eliminating hazards of a memory output by outputting data in a selected memory after an address input changes and then data with a specific level is outputed. CONSTITUTION:When a row line R0 is specified and a column specifying line C0 is specified, a transistor T0 turns on to lead the stored data of a memory cell MS, at the intersection of a column line I0 and the row line R0, to a node S. The potential at this node S is supplied as an output signal H from a column gate circuit 14 to an output circuit 15. On detecting the potential at the node S, this output circuit 15 performs waveform shaping, amplification, etc. to output the data contents of a selected memory cell from an output terminal OUT as an output signal D. This output circuit 15 is further supplied with a signal B from a pulse generating circuit 16 which generates the pulse according to charge of address data Ao-Ai.
JP8242180A 1980-06-18 1980-06-18 Semiconductor memory Granted JPS578988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8242180A JPS578988A (en) 1980-06-18 1980-06-18 Semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8242180A JPS578988A (en) 1980-06-18 1980-06-18 Semiconductor memory

Related Child Applications (3)

Application Number Title Priority Date Filing Date
JP60008736A Division JPS60167192A (en) 1985-01-21 1985-01-21 Semiconductor memory
JP62064319A Division JPS6387692A (en) 1987-03-20 1987-03-20 Semiconductor memory
JP62327172A Division JPS63200390A (en) 1987-12-25 1987-12-25 Semiconductor memory

Publications (2)

Publication Number Publication Date
JPS578988A true JPS578988A (en) 1982-01-18
JPS6118836B2 JPS6118836B2 (en) 1986-05-14

Family

ID=13774117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8242180A Granted JPS578988A (en) 1980-06-18 1980-06-18 Semiconductor memory

Country Status (1)

Country Link
JP (1) JPS578988A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169383A (en) * 1982-03-30 1983-10-05 Fujitsu Ltd Semiconductor storage device
JPS5963094A (en) * 1982-10-04 1984-04-10 Fujitsu Ltd Memory device
JPS604329A (en) * 1983-06-23 1985-01-10 Nec Ic Microcomput Syst Ltd Timing signal generating circuit
JPS63102093A (en) * 1986-10-17 1988-05-06 Nec Corp Semiconductor memory
US4982366A (en) * 1982-09-17 1991-01-01 Fujitsu Limited Static semiconductor memory with readout inhibit means
JPH0434791A (en) * 1990-05-31 1992-02-05 Fujitsu Ltd Semiconductor memory
WO1993004476A1 (en) * 1991-08-27 1993-03-04 Seiko Epson Corporation Semiconductor memory device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63248673A (en) * 1987-04-01 1988-10-14 アルプス電気株式会社 Packaging structure of electronic part

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169383A (en) * 1982-03-30 1983-10-05 Fujitsu Ltd Semiconductor storage device
US4982366A (en) * 1982-09-17 1991-01-01 Fujitsu Limited Static semiconductor memory with readout inhibit means
JPS5963094A (en) * 1982-10-04 1984-04-10 Fujitsu Ltd Memory device
JPS604329A (en) * 1983-06-23 1985-01-10 Nec Ic Microcomput Syst Ltd Timing signal generating circuit
JPS63102093A (en) * 1986-10-17 1988-05-06 Nec Corp Semiconductor memory
JPH0434791A (en) * 1990-05-31 1992-02-05 Fujitsu Ltd Semiconductor memory
WO1993004476A1 (en) * 1991-08-27 1993-03-04 Seiko Epson Corporation Semiconductor memory device
US5323359A (en) * 1991-08-27 1994-06-21 Seiko Epson Corporation Semiconductor memory device

Also Published As

Publication number Publication date
JPS6118836B2 (en) 1986-05-14

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