JPS58106919A - Noise reducing circuit in fm tuner - Google Patents

Abstract

PURPOSE:To reduce the discordant noise sound, by operating a filter by a switch circuit to attenuate high-band components of a stereo signal when the output of the stereo signal becomes a prescribed value or less. CONSTITUTION:A composite signal obtained from an FM detecting circuit is demodulated to left and right stereo signals in an FM multiplexer, 1 and they are taken out and are allowed to pass through LPFs 2 and 3 to eliminate the carrier leak, and these signals are outputted to terminals 4L and 4R through resistance R9 and R10. L and R components of stereo signals are amplified in amplifiers 5 and 6 and are given to transistors TRs Q1 and Q2, and a larger output is subjected to half-wave rectification selectively and is inputted to the + pole of a comparator 7. This output is compared with a prescribed level based on resistances R7 and R8 in the comparator 7; and when it is lower than the prescribed value, the output of the comparator 7 becomes L-level, and TRs Q3 and Q4 are turned off, and TRs Q5 and Q6 are turned on, and LPFs consisting of resistance R9 and R10 and capacitors C6 and C7 are operated, and high- band components of stereo signals are attenuated to reduce the noise sound.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction circuit in an FM chainer.

In general, the noise generated by an FM chainer under normal reception conditions will be harsher when the degree of modulation is large or small, or in other words, when the demodulation volume is large or small. Among the noise components, the one that is particularly harsh is the high-frequency noise component.

The present invention was invented in view of these problems in FM cheese, and it attenuates the high-frequency components of the frequency band of the Chener output only when the modulation degree decreases and the output level of the FM multiplex decreases. This is intended to reduce the harsh noise.

The attached drawing is an electrical circuit diagram showing the main parts of an FM cheese equipped with an embodiment of the noise reduction circuit according to the present invention.
1 in the figure is a well-known FM multiplex that inputs a manually input composite signal from an FM detection circuit (not shown) and demodulates it into left (L) and right (R) stereo signals. Carrier and R component respectively
The signal is output to the next stage from left and right output terminals 4L and 4R via low-pass filters (hereinafter referred to as LPF) 2 and 3 that remove leakage (mixing of 38 KHz subcarriers, etc.).

The circuit section including the FM multiplex 1 and LPF 2.3 is a circuit section that demodulates and extracts the conventional general left and right stereo signals in the FM cheese, and the section surrounded by the dashed line is the noise reduction circuit of the present invention. This is the circuit section that makes up the circuit.

In this circuit section, 5 connects the L component of the stereo signal output from LPF2 to resistor R1, capacitor C, and carrier.
Low-pass filter (
i anti-R3,! 6 is an amplifier that inputs and amplifies the R component of the stereo signal output from the LPF $ through a resistor R2, a capacitor C2, and a carrier ◇A low-pass filter to prevent malfunctions due to leakage. (consisting of resistor R4 and capacitor C4) is an amplifier that inputs and amplifies the signal.

Then, it is half-wave rectified by a circuit consisting of a stereo signal capacitor C5 amplified by the amplifier 5, and the amplifier 6
The R component of the stereo signal amplified by the transistor Q2
, a resistor R6, and a capacitor C5 to perform half-wave rectification. When the output level of these amplifiers 5 and 6 is higher than the output level of amplifier 6, the transistor Q2 is cut off, so the rectified output (L component of the stereo signal) of the transistor Q1 is output to the comparator. 7 and when the output level from amplifier 6 is higher than the output level from amplifier 5, transistor Q2 is cut off, so the rectified output by transistor Q2 (R component of the stereo signal) is input to the positive terminal of the comparator. It is designed to be input to the pole. That is, the outputs of the amplifiers 5 and 6 are selectively input to a comparator 7 according to their output levels, and in the comparator 7, the outputs from the amplifiers 5 and 6 are connected to a resistor. R7
, R8, and when it is smaller than the comparison level, it means that when the modulation degree has decreased and the output level of the FM multiplex 1 has decreased, the output level of the comparator 7 has already decreased. When the output of the amplifiers 5 and 6 becomes W (low) level and the outputs of the amplifiers 5 and 6 are higher than the comparison level, in short, when the degree of modulation increases, the output of the comparator 7 is configured to become a High level.

Next, transistor Q3. Q4 constitutes a switch circuit, and when the output of the comparator 7 is at a low level, both transistors Q3 and C4 are turned off, keeping the collector potential of transistor Q4 high and switching off the transistor Q4.
On the other hand, when the output of the comparator 7 is at a high level, the transistors Q3 and C4 are both turned on to lower the collector potential of the transistor Q4 and turn off the transistor qst C6.

The transistor Qst C6 is provided between the points e1 and C2 between the LPFs 2 and 3 and the output terminals 4L and 4R and the ground, and connects the collector terminal to the point e through the capacitors C6 and C, respectively. □9 Connected to C2 and emitter terminal connected to ground.

R9 and RIO are respectively the above points el, C2 and LPF2
．． resistors inserted between the capacitors C6 and C7, each forming a low-pass filter,
The above transistor Q5. When Q6 is turned on, it functions as a low-pass filter, removes high-frequency noise components contained in the stereo signals from LPFs 2 and 3, and limits the frequency band of the chainer output. 0 Since the present invention is constructed as described above, the FM
The multiplex 1 demodulates and extracts the composite signal obtained from the FM detection circuit in the previous stage into left and right stereo signals, and the LPFs 2 and 3 remove carrier leakage from the L and R components of the stereo signals.

The L and R components of the stereo signal output from this LPF 2.3 are passed through resistors R9 and RIO, respectively, to an output terminal 4L,
4R direction, and on the other hand, after being amplified by amplifiers 5 and 6, respectively, they are applied to transistors Qlt and Q2,
The one with a higher output level is selectively half-wave rectified and input to the ten poles of the comparator 7.

In the comparator 7, the output level of the stereo signal is compared with a comparison level set by resistors R7 and R8, and when the output level of the stereo signal is higher than the comparison level, the degree of modulation increases and the FM When the output level of multiplex 1 rises, the output of comparator 7 becomes High, and each transistor /Q3 . Q4 turns on and each transistor Q
Since 5sQ6 is turned off, resistors R9, RIO and capacitors C6, C7 do not function as a low-pass filter, and therefore the L and R components of the stereo signal output from each LPF 2.3 are high-frequency limited. The signal is output from the output terminals 4L and 4R without any interference.

When the output level of the stereo signal is lower than the comparison level, the modulation degree increases and the output level of the FM multiplex 1 decreases, and when the output level of the FM multiplex 1 decreases, the output of the comparator 7 decreases. w Toner) Each transistor Q3t Q4 of the switching circuit turns off, and each transistor Q5
t Since Q6 is turned on, resistor R9, RIO and capacitors C6 and C7 function as a low-pass filter, and therefore the L and R components of the stereo signal output from each LPF2.3 above are its high frequency components. The sound will be attenuated and the noise will be reduced.

As described above, the present invention operates a filter circuit to attenuate high-frequency components in the stereo signal only when the output level of the stereo signal demodulated and output by the 2M multiplex becomes below a predetermined comparison level. This makes it possible to automatically attenuate high-frequency component noise when the demodulation volume is low, thereby eliminating harsh noise and allowing you to listen to pleasant audio. It is an invention.

[Brief explanation of the drawing]

The attached drawing is an electrical circuit diagram showing the main parts of an FM cheese equipped with an embodiment of the noise reduction circuit according to the present invention. 1: 2M multiplex, 7: comparator. Agent Patent Attorney Aihiko Fukushi

Claims (1)

[Claims] 1. An FM multiplex that demodulates a composite signal into left and right stereo signals and outputs the demodulated signals, a comparison circuit means that compares the output level of the stereo signal output from the FM multiplex with a predetermined comparison level, and this comparison It consists of switching circuit means that performs switching based on the output of the circuit means, and filter circuit means that exhibits a filter function in response to the operation of the switching circuit means, and when the output level of the stereo signal is below the comparison level, the 1. A noise reduction circuit for an FM chainer, characterized in that switching circuit means is used to cause the filter circuit means to exhibit a filter function and attenuate high-frequency components in the stereo signal.