JPS5810968A - switching power supply circuit - Google Patents

switching power supply circuit

Info

Publication number
JPS5810968A
JPS5810968A JP56108485A JP10848581A JPS5810968A JP S5810968 A JPS5810968 A JP S5810968A JP 56108485 A JP56108485 A JP 56108485A JP 10848581 A JP10848581 A JP 10848581A JP S5810968 A JPS5810968 A JP S5810968A
Authority
JP
Japan
Prior art keywords
current
power supply
switching
transistor
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56108485A
Other languages
Japanese (ja)
Other versions
JPS6235310B2 (en
Inventor
Yasuro Nishinaka
西中 康郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56108485A priority Critical patent/JPS5810968A/en
Publication of JPS5810968A publication Critical patent/JPS5810968A/en
Publication of JPS6235310B2 publication Critical patent/JPS6235310B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18—Generation of supply voltages, in combination with electron beam deflecting
    • H04N3/185—Maintaining DC voltage constant

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To surely synchronize even with a large control power, by cutting off a pulse width controlling transistor (TR) controlling a switching TR at a trigger signal period. CONSTITUTION:A TRQ1 is a transistor for switching output and a TRQ2 for pulse width control is connected between the emitter and base. A diode D10 cuts off the TRQ2 at the period of trigger signal and inserted between the anode side of a diode D5 and the TRQ2. The diode D10 zeroes a current i2 at triggering to flow a trigger current i1 to the base of the TRQ1 as it is, allowing to obtain sure synchronism with the small trigger current i1.

Description

【発明の詳細な説明】 本発明はテレビジ画ン受倫機の電源回路として用いられ
る自励式スイッチング電源回路に関し。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a self-excited switching power supply circuit used as a power supply circuit for a television picture reception machine.

その目的とするところは従来よシも小さなト9ブー電流
で電源回路のスイッチング周波数を所定周波数に同期さ
せることができるものを提供することにある。
The purpose is to provide a device that can synchronize the switching frequency of a power supply circuit to a predetermined frequency with a smaller current than ever before.

第1図は従来の絶縁型自励式スイッチングレギユV−一
の基本回路図で、0)は商用電源、T、はコンバーター
トランス、Q、はスイッチング出力トランNxり、(2
)は負荷で、ここではテレビジ五ン受僚機の水平偏向回
路である。商用電源α)はダイオードD&−D4とコン
ダンtC1で整流平滑されてコンバータートフンス?、
〇−次巻線P1〜P、の巻き始めに印加されている。出
力部は前記スイッチング出力トヲンジスpQtトコンバ
ータートランスT、の二次巻線B、〜B1で自励発振を
行わせ、コンバータートフンスTt0二次巻線51〜S
、に発生するパルスをダイオードD−とコンダン−?C
4で整流平滑して負荷(2)に電流が供給されて水平偏
向回路が動作を開始する。更に従来ではスイッチングの
際の緘音発生が帰線期間となるようこの水平偏向回路の
フツイパツクパyス電圧FBPがトリガー用トランスT
1を介してスイッチング出力FランジスタQ10ベース
へフィードバックされ、スイッチ・ング周波数を水平周
波数fuK同期させている。R1は起動用抵抗。
Figure 1 is a basic circuit diagram of a conventional isolated self-excited switching regulator V-1, where 0) is the commercial power supply, T is the converter transformer, Q is the switching output transformer Nx, and (2
) is the load, in this case the horizontal deflection circuit of a TV receiver. The commercial power supply α) is rectified and smoothed by diodes D&-D4 and conductor tC1, and converted into a converter. ,
It is applied at the beginning of the windings P1 to P of the 〇-order windings. The output section causes self-excited oscillation to occur in the secondary windings B, ~B1 of the switching output transformer Tt0, and the secondary windings 51~S of the converter transformer Tt0.
, the pulse generated in the diode D- and the conductor-? C
4, the current is supplied to the load (2) and the horizontal deflection circuit starts operating. Furthermore, in the past, the horizontal deflection circuit's heavy duty voltage FBP was controlled by the trigger transformer T so that the generation of noise during switching occurred during the retrace period.
1 to the switching output F transistor Q10 base, and synchronizes the switching frequency with the horizontal frequency fuK. R1 is a starting resistance.

C,ハコンデンサで、スイッチング出力トランジスタQ
1のコレクタ電流が増加する際に再生作用を生じ易、く
するよう作用し、スイッチング出力トランジスタQ、が
オンの時には該コンダンすC3の抵抗R8との接続側一
端が正極性となるよう充電され、オフ時にはその電荷を
抵抗R8→二次巻線B、〜鳥→ホフト側アース0)→ダ
イオードD、の経路で放電し。
C, C capacitor, switching output transistor Q
When the collector current of the conductor C3 increases, the regeneration effect is likely to occur, and when the switching output transistor Q is on, one end of the conductor C3 connected to the resistor R8 is charged to have a positive polarity. , when off, the charge is discharged through the path of resistor R8 → secondary winding B, ~ bird → hoft side ground 0) → diode D.

この充放電を繰り返す6 D、は起動電流がトランスT
、の巻線を介してVヨードされることを防止するダイオ
ードである。なお、)フンスT、はトリガーパシス電圧
がコーVドVヤーV14)備から印加されるため、ホラ
)S/キャー/(2)側との絶縁のために必要である。
This charging and discharging is repeated 6D, the starting current is the transformer T
, is a diode that prevents V iodine from being applied through the windings of . In addition, since the trigger pass voltage is applied from the cord V-cord V-ya V14), T) is necessary for insulation from the Hola) S/Car/(2) side.

また、出力電圧の安定化はスイッチング出力トランジス
タQ1のペース電流を拘束することによって行われてお
p%Qmはスイッチング出力トランジスタQ1のベース
電流拘束用シランジス!で、実質的にパルス幅変調の動
作を行わせている。
Furthermore, the output voltage is stabilized by restricting the base current of the switching output transistor Q1. This essentially performs a pulse width modulation operation.

1は誤差増幅用シランsFxり、Dvは基準電圧用ツェ
ナーダイオード、R6は出力電圧設定用の可変抵抗IL
 Rle R4e Rle Rvは抵抗、D、はダイオ
ード。
1 is a silane sFx for error amplification, Dv is a Zener diode for reference voltage, and R6 is a variable resistor IL for setting the output voltage.
Rle R4e Rle Rv is a resistor, and D is a diode.

F1〜F、ハコンパーー−)フンスT1の二次II線で
。
F1~F, Hacompar-) In the secondary II line of Huns T1.

出力電圧の変動検出用に設けられており、ダイオードD
、とコンダン+C,による整流平滑後の電圧を−v1と
すると、何らかの原因で一■、の絶対値が小すくなつ九
場合には、トランジスタQ、のエミッターペース間の電
圧が下が9トフンジスタQ3のコレクタ電流が減少する
。すなわちトランジスタQ、のエミッタ電流が減少し、
スイッチング出力トランジスタQ、の導通期間を広げて
−vlの絶対値を上昇させるよう制御される。−V、の
絶対値が上記と逆になつ九場舎は逆の動作を行い、この
ようにして−vlの電位を安定化することで出力電圧を
安定に保っている。
Provided for detecting fluctuations in output voltage, diode D
If the voltage after rectification and smoothing by , and conductor +C is -v1, then if the absolute value of 1 becomes small for some reason, then the voltage between the emitter pace of transistor Q is lower than 9. collector current decreases. In other words, the emitter current of transistor Q decreases,
Control is performed to increase the absolute value of -vl by widening the conduction period of the switching output transistor Q. The Kubasa, in which the absolute value of -V is opposite to the above, performs the opposite operation, and by stabilizing the potential of -vl in this way, the output voltage is kept stable.

以上の従来回路において同期をかける場合、その時ニト
フンジスタQmのエミッタ電流1.として流すことので
きる電流値を11とし、トリI−電流110時々の電流
値を11とすると、第2図に示すようにI、< I、O
期間tではエミッタ電流1.がトリガー電流1.に伴り
て変化し、スイッチング出力トランジスタqペースに向
って流れる電流11はi、=0である。1.>1.にな
ってトリガー電流像はスイッチング出力トランジスタQ
1のペースへ電流t、として流れ始めて、スイッチング
トランジスタもがオンする。制御するパワーが増すにつ
れ、出力電圧を安定化させるためには電流値!、が大き
くなシ、それに伴い大きなトリガー電流11が必要とな
る。またトリガー電流i1が小さい場合には同期がかか
らない亭龜が発生する。
When synchronization is applied in the above conventional circuit, the emitter current of the Nitofungister Qm is 1. Assuming that the current value that can be passed as 11 is 11, and the current value of the current 110 is 11, as shown in Fig. 2, I, < I, O
During period t, the emitter current is 1. is the trigger current 1. The current 11 flowing towards the switching output transistor q pace changes with i,=0. 1. >1. The trigger current image is the switching output transistor Q
The current t begins to flow to the pace of 1, and the switching transistor also turns on. As the power to control increases, the current value must be increased to stabilize the output voltage! , is large, and accordingly a large trigger current 11 is required. Furthermore, when the trigger current i1 is small, a pause occurs in which synchronization is not applied.

第3図はL記問題点を回避することができる本発明の一
実施例を示し、第1図と同様の作用をなすものには同一
符号を付けてその説明を省く、D、・はトリガー信号期
間T〔第2図参照〕にトランジスI Qsをカットオフ
するようダイオードD、のアノード側と)ランジスl 
Qmのペースとの間に介装されたダイオードで、このよ
うに構成したためトーガーの際に電流値1.=Oにでき
るため、トリガー電流1tがそのままスイッチング出力
トブンジスIQ、のペースに向って流れ、小さなトリガ
電源部、で確実に同期をかけることができる。
FIG. 3 shows an embodiment of the present invention that can avoid the problem described in L. Components having the same functions as those in FIG. The anode side of the diode D and the transistor l are connected so as to cut off the transistor I Qs during the signal period T (see FIG. 2).
With the diode interposed between the pace of Qm and the current value of 1. = 0, the trigger current 1t flows directly at the pace of the switching output IQ, and synchronization can be reliably achieved with a small trigger power supply.

なお、上記実施例ではトランスT、を介して)リガー信
号を供給し九が、場合によってこれはコンデンサ結合あ
るいは直接に供給するように構成することもできる。
In the above embodiment, the rigger signal is supplied (via the transformer T), but depending on the case, it may be configured to be connected to a capacitor or to be supplied directly.

ま九水平周波数fwに同期させる場合を例に挙げて説明
し庭゛・・が、弯p自瞠郵nは整数ンに同期させる場合
も同様である。
The explanation will be given by taking as an example the case of synchronizing to the horizontal frequency fw, but the same applies to the case of synchronizing the curve to an integer number.

以上説明のように本発明によると、スイッチング出力ト
ランジスタのペースならびに該スイッチング出力トラン
ジスタのペース電流のパVス幅制御用トランジスタのペ
ースにトリガー電流スを印加して、トリガー信号期間に
パVス幅制御用Fフンジス−をカットオフするように構
成し九ため。
As described above, according to the present invention, the trigger current is applied to the pace of the switching output transistor and the pace of the transistor for controlling the path V path width of the pace current of the switching output transistor, and the path V path width is applied during the trigger signal period. It is configured to cut off the control F fungis.

制御パワーが大きくなった場合であっても小さなトリガ
ー電流で確実に同期させることかで籾るものである。
Even when the control power becomes large, it is necessary to ensure synchronization with a small trigger current.

【図面の簡単な説明】[Brief explanation of the drawing]

f@1図社従来の自励型スイッチングレギュレータの構
成図、第2図は第1図の動作説明図、第3図は本発明の
一実施例のスイッチングレギュレータの構成図である。 T、・−コンバータートフンス、T8・−トリガー用シ
フンス、Q1・−スイッチング出力トランジスタ、Q。 ・・・トランジスタ〔パMス幅制御用トランジスタ〕。 D2.・・・ダイオード、11−)リガー電流代理人 
 森 本 義 弘 第1図 丁 第2図
FIG. 2 is a diagram illustrating the operation of FIG. 1, and FIG. 3 is a diagram illustrating a switching regulator according to an embodiment of the present invention. T.--converter transistor, T8.--trigger shift, Q1.--switching output transistor, Q. ...Transistor [transistor for controlling path M path width]. D2. ...diode, 11-) rigger current agent
Yoshihiro Morimoto Figure 1, Figure 2

Claims (1)

【特許請求の範囲】[Claims] L  TVビジ腫ン受僚機の電源に使用され、スイッチ
ング周波数を水平偏崗肩波数1えはその整数倍の周波数
に同期するようトリガーされるスイッチング電源回路に
おいて、スイッチンダ出力トツンジスタのペースならび
に該スイッチング出力)フンレス一のペース電流のパV
ス幅制御用)ツンジスタのペースにトリガーパルスを印
加し、トリガー信号期間に前記パyス幅制御用トツンジ
スタをカッシオフするよう構成し九ことを特徴とするス
イッチング電源回路。
In a switching power supply circuit that is used for the power supply of a TV pilot aircraft and is triggered to synchronize the switching frequency to a frequency that is an integer multiple of the horizontal polarization shoulder number, the pace of the switcher output and the switching Output) The highest pace current without finless
9. A switching power supply circuit characterized in that the switching power supply circuit is configured to apply a trigger pulse to the pace of a tuning resistor (for width control) and to turn off the tuning resistor for width control during the trigger signal period.
JP56108485A 1981-07-11 1981-07-11 switching power supply circuit Granted JPS5810968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56108485A JPS5810968A (en) 1981-07-11 1981-07-11 switching power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56108485A JPS5810968A (en) 1981-07-11 1981-07-11 switching power supply circuit

Publications (2)

Publication Number Publication Date
JPS5810968A true JPS5810968A (en) 1983-01-21
JPS6235310B2 JPS6235310B2 (en) 1987-07-31

Family

ID=14485949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56108485A Granted JPS5810968A (en) 1981-07-11 1981-07-11 switching power supply circuit

Country Status (1)

Country Link
JP (1) JPS5810968A (en)

Also Published As

Publication number Publication date
JPS6235310B2 (en) 1987-07-31

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