JPS5812973U - 多層プリント基板 - Google Patents

多層プリント基板

Info

Publication number
JPS5812973U
JPS5812973U JP10741181U JP10741181U JPS5812973U JP S5812973 U JPS5812973 U JP S5812973U JP 10741181 U JP10741181 U JP 10741181U JP 10741181 U JP10741181 U JP 10741181U JP S5812973 U JPS5812973 U JP S5812973U
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
multilayer printed
connections
multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10741181U
Other languages
English (en)
Inventor
水越　淳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp filed Critical Pioneer Corp
Priority to JP10741181U priority Critical patent/JPS5812973U/ja
Publication of JPS5812973U publication Critical patent/JPS5812973U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の多層プリント基板を示す断面図、第２図
は本考案の一実施例を示す断面図（第３図めＢ−Ｂ矢視
図）、第３図は同平面図（第２図のＡ−Ａ矢視図）、第
４図は本考案の一実施例の製作工程を示す断面図である
。

Claims (1)

    【実用新案登録請求の範囲】
  1. 複数層からなるプリント基板において、該プリント基板
    各層の間に回路構成部品を内包しそれぞれのプリント基
    板間を熱処理、圧着、導電性接着剤等によりその配線接
    続を行なうとともに、前記回路構成部品によっても、そ
    れぞれのプリント基板間の接続を行うことのできること
    を特徴とする多層プリント基板。
JP10741181U 1981-07-20 1981-07-20 多層プリント基板 Pending JPS5812973U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10741181U JPS5812973U (ja) 1981-07-20 1981-07-20 多層プリント基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10741181U JPS5812973U (ja) 1981-07-20 1981-07-20 多層プリント基板

Publications (1)

Publication Number Publication Date
JPS5812973U true JPS5812973U (ja) 1983-01-27

Family

ID=29901850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10741181U Pending JPS5812973U (ja) 1981-07-20 1981-07-20 多層プリント基板

Country Status (1)

Country Link
JP (1) JPS5812973U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59159597A (ja) * 1983-03-03 1984-09-10 工業技術院長 耐衝撃実装法
JPH09312478A (ja) * 1996-05-22 1997-12-02 Nec Niigata Ltd 多層配線基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52140868A (en) * 1976-05-20 1977-11-24 Matsushita Electric Industrial Co Ltd Printed circuit board and method of producing same
JPS54104564A (en) * 1978-02-03 1979-08-16 Shin Kobe Electric Machinery Method of producing printed circuit board having electronic component elements on internal layer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52140868A (en) * 1976-05-20 1977-11-24 Matsushita Electric Industrial Co Ltd Printed circuit board and method of producing same
JPS54104564A (en) * 1978-02-03 1979-08-16 Shin Kobe Electric Machinery Method of producing printed circuit board having electronic component elements on internal layer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59159597A (ja) * 1983-03-03 1984-09-10 工業技術院長 耐衝撃実装法
JPH09312478A (ja) * 1996-05-22 1997-12-02 Nec Niigata Ltd 多層配線基板

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