JPS5814072A - Simultaneous counting circuit of positron lateral tomogram device - Google Patents
Simultaneous counting circuit of positron lateral tomogram deviceInfo
- Publication number
- JPS5814072A JPS5814072A JP11219581A JP11219581A JPS5814072A JP S5814072 A JPS5814072 A JP S5814072A JP 11219581 A JP11219581 A JP 11219581A JP 11219581 A JP11219581 A JP 11219581A JP S5814072 A JPS5814072 A JP S5814072A
- Authority
- JP
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- Prior art keywords
- detector
- layer
- circuit
- detectors
- coincidence
- Prior art date
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- Pending
Links
- 238000003325 tomography Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 abstract description 7
- 238000012545 processing Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 28
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 1
- 238000013480 data collection Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- KKCBUQHMOMHUOY-UHFFFAOYSA-N sodium oxide Chemical compound [O-2].[Na+].[Na+] KKCBUQHMOMHUOY-UHFFFAOYSA-N 0.000 description 1
- 229910001948 sodium oxide Inorganic materials 0.000 description 1
- 238000013517 stratification Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
- G01T1/29—Measurement performed on radiation beams, e.g. position or section of the beam; Measurement of spatial distribution of radiation
- G01T1/2914—Measurement of spatial distribution of radiation
- G01T1/2985—In depth localisation, e.g. using positron emitters; Tomographic imaging (longitudinal and transverse section imaging; apparatus for radiation diagnosis sequentially in different planes, steroscopic radiation diagnosis)
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Molecular Biology (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Measurement Of Radiation (AREA)
- Nuclear Medicine (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ポジトロン横断断層装置、特に複数に投与さ
れたポジトロン放出核種の生体内分布を画像として描出
する装置である。第1図はポジトロン横断断層装置の構
成の概要図である。図で、1は検出用(シンチレータ)
、2は光電子増倍管、3は前置増巾器等の電子回路の収
納部、4は被検体、5は同時計数回路、6はデータ収集
回路、7はデータ処理装置、8は画像表示装置である。DETAILED DESCRIPTION OF THE INVENTION The present invention is a positron transverse tomography device, particularly a device for depicting the biodistribution of a plurality of positron-emitting nuclides as images. FIG. 1 is a schematic diagram of the configuration of a positron transverse tomography device. In the figure, 1 is for detection (scintillator)
, 2 is a photomultiplier tube, 3 is a storage part for electronic circuits such as a preamplifier, 4 is a subject, 5 is a coincidence circuit, 6 is a data acquisition circuit, 7 is a data processing device, and 8 is an image display It is a device.
この装置では、被検体内のポジトロン放出核種から放出
されたポジトロン(陽電子)が、放出位置の近傍9で物
質中の電子と結合消滅する時発生するれを検出すれば、
ポジトロン放出核穐が検出器を結ぶ直線10の上に存在
していたことがわかる。同時計数回路5は二つの消滅ガ
ンマ線の検出が同時に行われたことを確認するために用
いられる。With this device, if we detect the lag that occurs when positrons emitted from positron-emitting nuclides within the subject are annihilated by combining with electrons in the substance near the emission position 9,
It can be seen that the positron-emitting nucleus was present on the straight line 10 connecting the detectors. The coincidence circuit 5 is used to confirm that two annihilation gamma rays have been detected simultaneously.
第1図で、検出器1としては、Na工結晶のようなガン
マ線検出用のシンチレータを用いる。ポジトロンの消滅
によって発生した消滅ガンマ線は、検出器1によってシ
ンチレーション(光)に変換され、このシンチレーショ
ン光は光電子増倍管2知い時間間隔(例えば、10nS
)で到着した二つの信号をAND回路で検出し、この二
つの信号を発生した検出器の組合せを表わす情報(たと
えば、回路6にムシ、検出器対に対応するメモリに計数
値として記録される。データ収集終了後、データ処理装
置7により画像再構成を行い、その結果を画像表示装置
8に表示する。データ処理装置7、画像表示装置8は、
現在、臨床検査に広く用いられているX線横断断層装置
におけるものと同一のものである。In FIG. 1, a scintillator for detecting gamma rays, such as a sodium oxide crystal, is used as the detector 1. The annihilation gamma rays generated by the annihilation of positrons are converted into scintillation (light) by the detector 1, and this scintillation light is transmitted to the photomultiplier tube 2 at a known time interval (for example, 10 nS).
) are detected by an AND circuit, and information representing the combination of detectors that generated these two signals (for example, a bug is detected in circuit 6, and a count value is recorded in the memory corresponding to the pair of detectors). After data collection is completed, the data processing device 7 performs image reconstruction and displays the result on the image display device 8.The data processing device 7 and the image display device 8
This is the same as that used in X-ray transverse tomography devices that are currently widely used in clinical examinations.
現在までの段階では、ポジトロン横断断層装置としては
、断層面が一つである単層の装置が製作されてきたが、
最近になって複数の横断断層面のデータを同時に収集で
きる多断層の装置が提案され製作されるようになってき
ている。第2図は、この多断層ポジトロン横断断層装置
の検出部の例出器層を表わす。この構成例では、多層の
検出器検出器対による同時計数の検出結果も利用じ、゛
′隣接する検出器層間に位置する断層面についても画像
を再構成表示することが行なわれている。Up to now, single-layer devices with a single fault plane have been manufactured as positron transverse fault devices;
Recently, multi-section devices that can simultaneously collect data on multiple transverse sections have been proposed and manufactured. FIG. 2 shows the sample layer of the detection section of this multi-section positron transverse tomography device. In this configuration example, the results of coincidence detection by multi-layered detector-detector pairs are also used to reconstruct and display images of tomographic planes located between adjacent detector layers.
一般に、検出器層間の同時計数についても、検出器層内
の同時計数回路と同一の回路を用いることができる。た
とえば、第2図の被検体4内で発第3図は、以上の考え
方に基づいて同時計数回路構成の例である。11 、1
2 、13は第2図に示した第1.第2.第3の検出器
層を示し、21〜26は検出器を示す。各検出器内の記
号(i −n )は検出器番号を示す。一つの検出器層
内の検出器の数は、だけ存在するものと考えているが、
図ではそのうちの一つだけを示し、他は省略している。Generally, the same circuit as the coincidence circuit in the detector layer can be used for coincidence counting between the detector layers. For example, the signal generated within the subject 4 in FIG. 2 is shown in FIG. 3 as an example of a coincidence circuit configuration based on the above concept. 11, 1
2 and 13 are No. 1 shown in FIG. Second. A third detector layer is shown, and 21-26 indicate detectors. The symbol (i-n) within each detector indicates the detector number. We assume that the number of detectors in one detector layer is
In the figure, only one of them is shown and the others are omitted.
同時計数回路31 、33 、35は第1.第2.第3
の検出器層内の検出器対に対応し、同時計数回路32
、34は第数回路32 、34は同時計数回路31等と
同じ回路構成となっている。The coincidence circuits 31, 33, 35 are the first . Second. Third
The coincidence circuit 32 corresponds to the detector pair in the detector layer of
, 34 have the same circuit configuration as the number circuit 32, 34 has the same circuit configuration as the coincidence circuit 31, etc.
この第3図に示した同時計数回路の構成例では、入力信
号の組合せをつくる基本的な考え方を示した。同時計数
回路は同時計数をとる検出器の組合せすべてに対し一つ
ずつ設けられているとする。The configuration example of the coincidence circuit shown in FIG. 3 shows the basic concept of creating combinations of input signals. It is assumed that one coincidence circuit is provided for every combination of detectors that take coincidence counts.
この時には、同時計数回路内のAND回路の出力が生じ
た時、二つの入力信号が同時に発生したことを意味し、
データ収集回路へは、同時計数回路の識別信号(たとえ
ば、第3図に示すような検出′路技術で通常用いられて
いる方法でよく、説明は省略する。At this time, when the output of the AND circuit in the coincidence circuit occurs, it means that two input signals are generated at the same time.
The identification signal of the coincidence circuit (for example, a method commonly used in detection path technology as shown in FIG. 3) may be applied to the data acquisition circuit, and a description thereof will be omitted.
さて、第3図の同時計数回路の構成例では、各検出器層
内および各検出器層間の同時計数回路が分離独立してい
るので、検出器層の増減に容易に対処することができ、
また回路の保全作業にも都合がよい。さらに、各同時計
数回路の入力における計数率は、各検出器の計数率に等
しく、従って比較的低い値に抑えられ、同時計数の数え
落しも少なく、良好な計数率特性が期待できる。しかし
、同時計数回路の設置数が多くなシ、特に設置一つにま
とめて取扱うことによシ、同時計数を検出する信号の組
合せを減らす方法がある。しかし、層化に伴う同時計数
回路の設置数の増大に対処するため、適正な数の同時計
数回路をもって構成し、かって複数個の検出器の出力の
論理和を作シ、これを同時計数回路の少なくとも一つの
入力信号とすることにより同時計数を検出する信号の組
合せ数を減少せしめるようにした点にある。以下、本発
明を図面によシ詳述する。Now, in the configuration example of the coincidence circuit shown in FIG. 3, since the coincidence circuits within each detector layer and between each detector layer are separated and independent, it is possible to easily deal with increases and decreases in the number of detector layers.
It is also convenient for circuit maintenance work. Further, the counting rate at the input of each coincidence counting circuit is equal to the counting rate of each detector, and therefore is suppressed to a relatively low value, and there are few omissions in coincidence counting, and good counting rate characteristics can be expected. However, if a large number of coincidence circuits are installed, there is a method of reducing the combination of signals for detecting coincidence, especially by handling them all together. However, in order to cope with the increase in the number of coincidence circuits installed due to stratification, the structure was constructed with an appropriate number of coincidence circuits, and the outputs of multiple detectors were logically summed. By using at least one input signal as the input signal, the number of combinations of signals for detecting coincidence can be reduced. Hereinafter, the present invention will be explained in detail with reference to the drawings.
第4図は検出器層が3層の場合の本発明の同時計数回路
の構成図である。この実施例では、各検出器層の同一番
号の検出器(検出器が円環状に配列されている場合には
円周上の同一位置にある検出器)の出力をOR回路で結
合して一括して取扱うようにした点に特徴を持つ。第4
図で、20A〜OR回路40Bへの入力は、各層でのj
第1の検出器20B 、 20D 、 20Fの出力で
ある。FIG. 4 is a configuration diagram of the coincidence counting circuit of the present invention when the detector layer is three layers. In this example, the outputs of the detectors with the same number in each detector layer (detectors located at the same position on the circumference when the detectors are arranged in a ring) are combined using an OR circuit and collectively It is characterized by the fact that it is handled as such. Fourth
In the figure, the inputs to the OR circuits 20A to 40B are j at each layer.
These are the outputs of the first detectors 20B, 20D, and 20F.
検出器の出力における計数率を等しいとしてnとする時
、同時計数回路の入力は各々3nの計数率となり、同時
計数の数え落しは、第3図の事例(同時計数回路の入力
の計数率は共にnとする)の9倍になる。従って、第4
図の実施例では、同は省略したが、各検出器層の出力信
号をOR回路40A 、 40Bへ入力すると同時にエ
ンコーダにも入力し、同時計数回路の出力信号である検
出器組合せの識別信号に、検出器層あるいは検出密層組
合時計数回路を設置するものとしている。従って、)検
出器層3r@の場合には、検出器層間が2層存在するの
で同時計数回路の数は、第3図の構成に比べてV7にな
る。この第5図の構成上の特徴は、ゐみからなυ、他の
一つは隣接する2検出器層の検出器出力の論理和とする
ことである。When the counting rate at the output of the detector is assumed to be equal and is set to n, the inputs of the coincidence circuit each have a counting rate of 3n. (both are n). Therefore, the fourth
Although not shown in the embodiment shown in the figure, the output signals of each detector layer are input to the OR circuits 40A and 40B, and are also input to the encoder at the same time, and the identification signal of the detector combination, which is the output signal of the coincidence circuit, is input to the OR circuits 40A and 40B. , a detector layer or a detection dense layer combination clock counting circuit is installed. Therefore, in the case of the detector layer 3r@, since there are two layers between the detector layers, the number of coincidence circuits is V7 compared to the configuration shown in FIG. The structural feature of FIG. 5 is that one of them is υ, and the other is the logical sum of the detector outputs of two adjacent detector layers.
具体的に述べよう。第1検出器層11に属する検出器(
番号1)20Aの出力は、直接に同時計数回路30Aの
入力となっている。さらに、第1検出器層11内の検出
器(番号j)20Bの出力と第2検出器層12内の検出
器(番号j)20Gの出力とはOR回路40Cで論理和
をとった後に同時計数回路30Aに入力している。これ
によシ第1検出器層11内については、検出器対tjの
同時計数が検出でき、対の処理を同時計数回路30Bが
行っている。同時計数回路30Cはklの検出器対の処
理を行う。Let's be specific. Detectors belonging to the first detector layer 11 (
The output of number 1) 20A is directly input to the coincidence counting circuit 30A. Furthermore, the output of the detector (number j) 20B in the first detector layer 11 and the output of the detector (number j) 20G in the second detector layer 12 are logically summed by an OR circuit 40C, and then are simultaneously output. It is input to the counting circuit 30A. As a result, the coincidence of the detector pair tj can be detected in the first detector layer 11, and the coincidence circuit 30B processes the pair. The coincidence circuit 30C processes kl detector pairs.
かかる構成による入力の計数率は、一つの検出器の出力
の計数率がnの時、nと2nとなる。従って、第3図の
構成に比べ、同時計数の数え落しが2.5倍となる。こ
のように、検出器層間の同時計数回路を設けないにもか
かわらず、比較的良好な計数率特性が期待でき、第4図
の実施例に比してより広い適用性を持つ。なお、この実
施例では、層2の信号(検出器番号jの信号)を出力す
ればよい。The input counting rate with this configuration is n and 2n when the output counting rate of one detector is n. Therefore, compared to the configuration shown in FIG. 3, the number of coincidence counts is 2.5 times greater. In this way, although a coincidence circuit is not provided between the detector layers, relatively good count rate characteristics can be expected, and this embodiment has wider applicability than the embodiment shown in FIG. In this embodiment, it is sufficient to output the signal of layer 2 (signal of detector number j).
以上の説明では、検出器の出力を直接または複たな信号
として取扱う方法が一般に採用されている。このような
やり方に本発明を適用するには、In the above description, a method is generally adopted in which the output of the detector is handled directly or as multiple signals. To apply the present invention in this manner,
第1図はポジトロン横断断層装置の全体構成の概要図、
第2図は検出器系の構成図、第8図は同時計数回路の従
来例図、第4図は本発明の同時計数回路の実施例図、第
5図は他の実施例である。
H、12、13−・・検出器層、30.3OA、30B
、30C・・・同時計数回路、40A 、 40B 、
40C、40D・・・OR回路。
特許出願人 科学技術庁放射線医学総合研究所長無形J
L、に
第1図
3
第2図Figure 1 is a schematic diagram of the overall configuration of the positron transverse tomography device.
FIG. 2 is a block diagram of a detector system, FIG. 8 is a diagram of a conventional coincidence circuit, FIG. 4 is a diagram of an embodiment of the coincidence circuit of the present invention, and FIG. 5 is another embodiment. H, 12, 13--detector layer, 30.3OA, 30B
, 30C...coincidence circuit, 40A, 40B,
40C, 40D...OR circuit. Patent applicant: National Institute of Radiological Sciences, Science and Technology Agency, Intangible J
L, Fig. 1 3 Fig. 2
Claims (1)
検出器層間の検出器対によシ消滅ガンマ線の同時計数を
検出する同時計数回路において、2層以上の検出器層に
属する検出器あるいは検出器群の出力の論理和の信号を
少なくとも一つの入力信号とするポジトロン横断断層装
置の同時計数3、一つの検出器層に属する検出器あるい
は検出器群の出力の信号と、この検出器層とこの検出器1. In a coincidence circuit that has multiple detector layers and detects the coincidence of annihilation gamma rays by detector pairs within a detector layer and between adjacent detector layers, the detector layer belongs to two or more detector layers. Coincidence counting 3 of a positron transverse tomography device in which at least one input signal is a logical sum signal of outputs of a detector or a group of detectors, and a signal of an output of a detector or a group of detectors belonging to one detector layer and this Detector layer and this detector
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11219581A JPS5814072A (en) | 1981-07-20 | 1981-07-20 | Simultaneous counting circuit of positron lateral tomogram device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11219581A JPS5814072A (en) | 1981-07-20 | 1981-07-20 | Simultaneous counting circuit of positron lateral tomogram device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5814072A true JPS5814072A (en) | 1983-01-26 |
Family
ID=14580636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11219581A Pending JPS5814072A (en) | 1981-07-20 | 1981-07-20 | Simultaneous counting circuit of positron lateral tomogram device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5814072A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63238486A (en) * | 1987-03-26 | 1988-10-04 | Shimadzu Corp | Positron CT device |
| US5245379A (en) * | 1988-05-12 | 1993-09-14 | Minolta Camera Kabushiki Kaisha | Exposure value setting device for a camera |
| US6828564B2 (en) * | 2002-07-08 | 2004-12-07 | Photodetection Systems, Inc. | Distributed coincidence processor |
| JP2006098411A (en) * | 2005-11-15 | 2006-04-13 | Hitachi Ltd | PET apparatus and method for controlling PET apparatus |
| WO2010086899A1 (en) * | 2009-01-30 | 2010-08-05 | 株式会社島津製作所 | Radiation tomography apparatus |
-
1981
- 1981-07-20 JP JP11219581A patent/JPS5814072A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63238486A (en) * | 1987-03-26 | 1988-10-04 | Shimadzu Corp | Positron CT device |
| US5245379A (en) * | 1988-05-12 | 1993-09-14 | Minolta Camera Kabushiki Kaisha | Exposure value setting device for a camera |
| US6828564B2 (en) * | 2002-07-08 | 2004-12-07 | Photodetection Systems, Inc. | Distributed coincidence processor |
| JP2006098411A (en) * | 2005-11-15 | 2006-04-13 | Hitachi Ltd | PET apparatus and method for controlling PET apparatus |
| WO2010086899A1 (en) * | 2009-01-30 | 2010-08-05 | 株式会社島津製作所 | Radiation tomography apparatus |
| JP4983984B2 (en) * | 2009-01-30 | 2012-07-25 | 株式会社島津製作所 | Radiation tomography equipment |
| US8519341B2 (en) | 2009-01-30 | 2013-08-27 | Shimadzu Corporation | Radiation tomography apparatus |
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