JPS58141018A - Automatic gain control circuit - Google Patents
Automatic gain control circuitInfo
- Publication number
- JPS58141018A JPS58141018A JP2402282A JP2402282A JPS58141018A JP S58141018 A JPS58141018 A JP S58141018A JP 2402282 A JP2402282 A JP 2402282A JP 2402282 A JP2402282 A JP 2402282A JP S58141018 A JPS58141018 A JP S58141018A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- signal
- gain control
- gain amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 230000001052 transient effect Effects 0.000 abstract description 10
- 230000000630 rising effect Effects 0.000 abstract description 5
- 230000001629 suppression Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 9
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 3
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は自動利得制御回路(AGC回路)に関する。[Detailed description of the invention] The present invention relates to an automatic gain control circuit (AGC circuit).
通信回線の信号対雑音比(8/N)を改善するためにし
ばしば音節型圧伸器が用いられる。又、過大レベルの入
力信号に対する出力信号のレベルを制限するためにAG
C回路も良く用いられる。Syllable companders are often used to improve the signal-to-noise ratio (8/N) of communication lines. In addition, AG is used to limit the output signal level in response to excessively high input signals.
C circuits are also often used.
過信回線の送信側では音節型圧伸器の圧縮器とAGC回
路との両方を組み合わせて用いる場合も多い、8/N改
善のための圧縮器はなるべく前段に、過、大入力信号に
対する出力レベル制限のためのAGC回路はなるべく後
段にそれぞれ配置するのが普通である。とζろで圧縮器
は入力信号のないとき最大ゲインとなっているため、急
峻に立上る入力信号の立上り部分に対しては十分に圧縮
機能が働かないから、過大な過渡出力を生ずる。AGC
回路は、この過大な過渡出力を圧縮しようとするために
AGC回路の出力レベルを減少させる方晶に働くが、A
GC回路の時定数(回復時間)が、通常長いため圧縮器
が過渡状態から定常状態に回復した後でもなおしばらく
の間利得の低い状態が続く、そこで、AGC回路の出力
に拡急激な立上〕に続いて−1レベルが過小と門る部分
が生じてしまい、出力信号レベルを一定にするというA
GC回路の目的に反することとなっていた。On the transmitting side of an overconfident line, both a syllable compander compressor and an AGC circuit are often used in combination.The compressor for 8/N improvement is placed in the front stage as much as possible to reduce the output level for excessive and large input signals. It is common that the AGC circuits for restriction are arranged as late as possible. Since the compressor is at its maximum gain when there is no input signal, the compression function does not work sufficiently for the steeply rising part of the input signal, resulting in an excessive transient output. AGC
The circuit works squarely to reduce the output level of the AGC circuit in order to try to compress this excessive transient output, but A
The time constant (recovery time) of the GC circuit is usually long, so even after the compressor recovers from a transient state to a steady state, the gain remains low for some time. ], there is a part where the -1 level is too low, and it is difficult to keep the output signal level constant.
This was contrary to the purpose of the GC circuit.
第1図は圧縮器の信号を受ける場合の従来のAGC回路
を示すブロック図、第2図はその各部信号波形図である
。入力端子1へ入力された信号21は圧縮器2を経て信
号22となり、更にAGC回路3の可変利得増幅器4で
増幅されて出力端子5から外部の装置へ出力される。A
GC回路3には、可−利得増幅器4に対し、レベル変動
検出回路(検波1))sおよび利得制御信号発生回路7
からなる負帰還回路が設けである。この出力端子5から
得られる出力信号230レベルは、瞬時過大入力の立上
多部分で過大であるとともに、それに続くしばらくの時
間で拡逆に過小となっていて、過渡応答特性が悪い。FIG. 1 is a block diagram showing a conventional AGC circuit when receiving a signal from a compressor, and FIG. 2 is a signal waveform diagram of each part thereof. A signal 21 input to the input terminal 1 passes through the compressor 2 and becomes a signal 22, which is further amplified by the variable gain amplifier 4 of the AGC circuit 3 and output from the output terminal 5 to an external device. A
The GC circuit 3 includes a gain amplifier 4, a level fluctuation detection circuit (detection 1)) and a gain control signal generation circuit 7.
A negative feedback circuit is provided. The level of the output signal 230 obtained from the output terminal 5 is excessive during the rising portion of the instantaneous excessive input, and becomes excessively low for a while after that, resulting in poor transient response characteristics.
本発明は瞬時過大入力に対し過渡応答特性の優れたAG
C回路の提供を目的とする。The present invention provides an AG with excellent transient response characteristics against instantaneous excessive input.
The purpose is to provide C circuits.
本発明による自動利得制御回路の構成線、入力信号を受
ける可変利得増幅器と、この可変利得増幅器の出力を受
ける振幅制限器と、この振幅制限tibo出力を受ける
レベル変動検出回路と、このレベル変動検出回路出力を
受は前記可変利得増幅器の利得を制御する信号を発生す
る回路とを備え、この利得制御は前記可変利得増幅器O
出力レベルを安定させゐ方向に行われる仁とと、前記可
愛利得増幅IlFオた韓振輻制限器の出力を外部へ出力
信号として取出すこととを特徴とする。The configuration lines of the automatic gain control circuit according to the present invention include a variable gain amplifier receiving an input signal, an amplitude limiter receiving the output of this variable gain amplifier, a level fluctuation detection circuit receiving this amplitude limited tibo output, and this level fluctuation detection a circuit receiving the circuit output and generating a signal for controlling the gain of the variable gain amplifier, the gain control being performed by the variable gain amplifier O.
The present invention is characterized in that the output level is stabilized in the direction shown in FIG.
次に図面を参照して本発明の詳細な説明する。Next, the present invention will be described in detail with reference to the drawings.
第3図は本発明の一実施例を示す回路図、第4図はその
出力波形図である。このAGC回路は、負帰還回路に振
幅制限器13を備え、可変利得増幅器4に加えられる利
得制御電圧(利得制御信号発生回路7の出力)が所定の
値を越えない様に制御している。こうすると、AGC回
路の帰還回路Ka過大な信号が入力されなくなる。そこ
で、急峻に立上る信号が入力されたときにおけるこのA
GC回路O出力は、振幅制御@Oないときに比べ、立上
〕時の最大レベルが小さく、それに続く時間0レベル抑
圧が少ない、従って、瞬時過大入力があったときによ〕
速く定常状態に復帰し、過渡応答が改善される。第2図
に例示した入力波形22を端子11に加えると端子12
における出力波形33は′第4図に示す如くなる。第1
図の従来回路における波形23に比べ過度応答は著しく
改善されている。FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is an output waveform diagram thereof. This AGC circuit includes an amplitude limiter 13 in the negative feedback circuit, and controls the gain control voltage (output of the gain control signal generation circuit 7) applied to the variable gain amplifier 4 so that it does not exceed a predetermined value. This prevents excessive signals from being input to the feedback circuit Ka of the AGC circuit. Therefore, when a sharply rising signal is input, this A
The GC circuit O output has a smaller maximum level at startup than when there is no amplitude control @O, and there is less suppression of the 0 level during the following time, so it is better when there is an instantaneous excessive input.
It quickly returns to steady state and improves transient response. When input waveform 22 illustrated in FIG. 2 is applied to terminal 11, terminal 12
The output waveform 33 at ' is as shown in FIG. 1st
The transient response is significantly improved compared to waveform 23 in the conventional circuit shown in the figure.
第5図は本発明の他の実施例を示す回路図である。出力
端子12を可変利得増幅器4の出力端に接続し九方式で
あり、他は第3図の回路と同様である。FIG. 5 is a circuit diagram showing another embodiment of the present invention. The output terminal 12 is connected to the output terminal of the variable gain amplifier 4 in a nine-way system, and the rest is the same as the circuit shown in FIG.
以上の説明では圧縮器の出力信号を受ける場合について
述べたが、リンギング又はサージを伴ったパルス的波形
など圧縮器出力に類似した瞬時過大波形のある入力信号
に対しても、本発明は顕著な効果を呈する。In the above explanation, the case where the output signal of the compressor is received has been described, but the present invention can also be applied to an input signal having an instantaneous excessive waveform similar to the compressor output, such as a pulse waveform accompanied by ringing or surge. exhibits an effect.
以上詳述し九ように1本発明によれば瞬時過大入力に対
し過渡応答特性の優れたAGC回路を提供できるという
効果がある。As described above in detail, one advantage of the present invention is that it is possible to provide an AGC circuit with excellent transient response characteristics against instantaneous excessive input.
第1図は圧縮器出力を受ける従来の自動利得制御回路を
示す回路図、第2同社その各部信号波形図、1Ics図
は本発明の実施例を示す回路図、第4固状そO出力波形
図、第5図は本発明の他O実施例を示す回路図である。
2・・・−・圧縮器、3・・・・・・自動利得制御回路
、4・・・・・・可変利得増幅器、6・・・・・・レベ
ル変動検出回路、7・・・・・・利得制御信号発生回路
、13・・・・・・振幅制限器。
第 1 閘
箔Z@ 箭4図
’)153図
%5図
−とFig. 1 is a circuit diagram showing a conventional automatic gain control circuit that receives the compressor output, Fig. 2 is a signal waveform diagram of each part of the same, Fig. 1 Ics is a circuit diagram showing an embodiment of the present invention, and Fig. 4 is a solid state output waveform. FIG. 5 is a circuit diagram showing another embodiment of the present invention. 2... Compressor, 3... Automatic gain control circuit, 4... Variable gain amplifier, 6... Level fluctuation detection circuit, 7... - Gain control signal generation circuit, 13...amplitude limiter. No. 1 Lock foil Z @ Sword 4 figure') 153 figure %5 figure - and
Claims (1)
器の出力を受ける振幅制限器と、この振幅制限器の出力
を受けるレベル変動検出回路と、このレベル変動検出回
路出力を受は前記可変利得増幅器の利得を制御する信号
を発生する回路とを備え、この利得制御は前記可変利得
増幅器の出力レベルを安定させる方向に行われることと
、前記可変利得増幅器または振幅制限器の出力を外部へ
出力信号として取出すこととを特徴とする自動利得制御
回路。a variable gain amplifier that receives an input signal; an amplitude limiter that receives the output of the variable gain amplifier; a level fluctuation detection circuit that receives the output of the amplitude limiter; a circuit that generates a signal for controlling the gain, the gain control is performed in a direction to stabilize the output level of the variable gain amplifier, and the output of the variable gain amplifier or the amplitude limiter is sent to the outside as an output signal. An automatic gain control circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2402282A JPS58141018A (en) | 1982-02-17 | 1982-02-17 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2402282A JPS58141018A (en) | 1982-02-17 | 1982-02-17 | Automatic gain control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58141018A true JPS58141018A (en) | 1983-08-22 |
Family
ID=12126903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2402282A Pending JPS58141018A (en) | 1982-02-17 | 1982-02-17 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58141018A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4946294U (en) * | 1972-07-29 | 1974-04-23 | ||
| JPS5535592A (en) * | 1978-09-06 | 1980-03-12 | Nec Corp | Signal amplitude expander with limiter |
| JPS55104143A (en) * | 1979-02-02 | 1980-08-09 | Matsushita Electric Ind Co Ltd | Signal processor |
-
1982
- 1982-02-17 JP JP2402282A patent/JPS58141018A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4946294U (en) * | 1972-07-29 | 1974-04-23 | ||
| JPS5535592A (en) * | 1978-09-06 | 1980-03-12 | Nec Corp | Signal amplitude expander with limiter |
| JPS55104143A (en) * | 1979-02-02 | 1980-08-09 | Matsushita Electric Ind Co Ltd | Signal processor |
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