JPS58155509A - Reproducer for audio signal - Google Patents

Abstract

PURPOSE:To correct a block having an error with blocks before and after it, when the error exceeds a specified value, by recording and reproducing audio signals with PCM, storing the reproduced PCM signal in a memory and checking the error. CONSTITUTION:A reprodcuing signal Sc is a signal Sd delayed by one unit period via a delay circuit 51. The signal Sc is applied to an error check circuit 54 to check whether or not the error correction is possible at each block, and a flag Pe being 0 when the error correction is possible and being 1 when impossible is extracted. Similarly, the signal Sd is applied to an error check circuit 55, and a flag Pf is extracted. The falgs Pe, Pf are applied to a logic circuit 58 and a pulse Pf' is applied to a decoder 22 as a write inhibition signal of memory circuits 23A, 23B. Thus if a signal is not suitable to the PCM demoulation, the demodulation is done from a PCM signal Sc before and after the signal, allowing to obtain an audio signal having no problem for listening.

Description

DETAILED DESCRIPTION OF THE INVENTION When recording and reproducing audio signals, if the audio signals are converted into PCM, high-quality recording and reproducing can be achieved.

FIGS. 1 and 2 show an example of a recording system and a reproducing system of such a PCM tape recorder.

That is, in the recording system shown in FIG.
m is supplied to the A/D converter aSK through the input terminal αυ, and as shown in FIG. I'll show you Figure 5 BK through the notes on 5! circuit(
14A) * (14B) K For example, if the data is written alternately in 1/60 second increments, the written signal Sp is written at twice the writing speed for a period' as shown in FIG. 5C.
h, and are read out alternately.

In this case, in Fig. 5, the period Ta@Tb is 1.
/Unit period located alternately every 60 seconds, period TO*T
1 is the first half and the second half when the period Ta'rb is divided into two equal parts.

Therefore, from the encoder al, the time axis is compressed by MK as shown in FIG.
Signal 8C is taken out. That is, each block of signal 8c has audio information for 1/60 second,
And the time axis is compressed to % and P located in the period TI K
It is a CM signal.

Further, at this time, an error correction/correction code forming circuit a9 is connected to the encoder 0, and processing for error correction and error correction is performed for each block of the signal 8c. Interleaving is performed within one block, and KCRC and parity bits are added every three words. The signal 8c also has a 11Nk preamble (run-in-dyne) for each of its blocks.

Note that the above processing by the circuits a3 to (lcJK) is performed in synchronization with the clock and control signals from the circuit forming circuit (to).

This signal Sc is then supplied to the rotating magnetic head (IA)*(IB)K through the recording amplifier (Ill).

This head (CIA) has an angular spacing of K 180@ from each other as shown in Fig. 3, and the arrow (IB) is rotated by the motor (4) K at a rate of 30 times per second through the rotating shaft (3). 6H), and the magnetic tape (2) is rotated obliquely over an angular range of more than 90e with respect to this rotational phase, and this tape (2) is rotated by a capstan and a pinch roller (not shown). ) It is made to run at a constant speed in the direction of arrow (6T) from K.

Further, the rotation of the head (IA) v (IB) is synchronized by the servo control for a period TleTbi (i.e., from the forming circuit to each starting point of the period T1 in the period TaK as shown in FIG. 5EK). A pulse Pr is generated at the servo circuit -υ, and the pulse Pr is supplied to the servo circuit -υ.
'One pulse is taken out for each rotation of (IA)t(IB), this pulse is supplied to the servo circuit, and the output of the servo circuit Qυ is supplied to the motor (4)K, as shown in Fig. 3. Then, at the time of pulse Pr, the head (IA) - (
The rotational phase of IB) is controlled.

Therefore, the Tlk head (one person) in the period Ta scans the tape (2), and the Tlk head (IB) in the period Tb scans the tape (2).
) scans the tape (2), so that the signal 8c is sequentially recorded as one magnetic track (3), each of which is diagonal, as shown in FIG.

In addition, the pulse Pr from the control circuit (to) is supplied to the magnetic head through the recording amplifier, and as shown in FIG. recorded.

As described above, in the apparatus system shown in FIG. 1, the audio signal 8a is recorded in PCM.

On the other hand, in the reproduction system shown in Fig. 2, the head (C) reproduces the pulse Pr from the track (3C) of the tape (2), and the third pulse Pr is supplied to the servo circuit @DK, and the head (lA), ( tB) is servo-controlled to scan the same opening position as at the time of placement. In this way, the signal 8c is output from the head (IA) (IB) every period TI as shown in FIG. 5Fk.

This signal 8c is then supplied to a reproduction decoder through a reproduction amplifier a11), and the original PCM signal Sp is demodulated. That is, the signal 8c supplied to the decoder is written into the alternate busy memory circuits (23A) and (23B) every K 17' as shown in FIG. The written signal Sc
is read out alternately at a speed of H when written, and therefore,
A PCM signal 8p expanded to the original time axis is continuously taken out from the decoder @ as shown in FIG. 5IK.

Further, at this time, an error check circuit c!4 is connected to the decoder (221), and error checking is performed using the CRC, parity bit, etc., and error correction is performed based on the result of this check.

Then, this signal 8p is supplied to the error correction circuit (2!9) to correct the error that could not be corrected, and this error-corrected signal 8p is supplied to the D/A converter 2!9 to restore the original audio signal. 81, and this signal 8a is taken out to the output terminal @.

Note that during this reproducing operation, the clock forming circuit 001 generates clock and control signals and supplies them to the circuit ~@, and at this time, the pulse Pr from the head is generated at the start of period T1 in period Ta. It is supplied to the formation circuit (it) K as a signal indicating .

As described above, in the tape recorder of FIGS. 1 and 2, the audio signal Sa is converted into PCM and recorded and reproduced, so that high-quality recording and reproduction can be performed.

By the way, in such a tape recorder, the PCM signal 8c (signal 8p) is lost due to dropouts during playback.
) A K error may occur, and in this case, unless error correction or correction is performed, K noise will occur in the reproduced audio signal 8a.

Therefore, in the decoder and error correction circuit (c) of the reproduction system (Fig. 2), error correction and error correction are performed. There are methods such as holding the previous value.Also, average value interpolation and cubic interpolation are quite effective methods because the number of detected localized rlI is high, but they cannot be used when errors occur continuously, especially the above-mentioned method. In this tape recorder, the time axis of the audio signal S1 is compressed to approximately H, so the influence of mud tag-out is increased by the amount of compression, which is even more so.

Therefore, for consecutive errors, correction (interpolation) is performed by holding the previous value, but since the detection limit frequency of holding the previous value is low, if there are many consecutive errors, or one consecutive error If the rack (3) becomes too long, it will not be an effective method and will lead to deterioration of the sound quality.Also, as shown in Figure 4, when the rack (3) is formed diagonally, dust and tape (2) Scratches etc. may extend over two or more tracks (3)K. Therefore, when a signal 8c K error occurs, this may occur over two or more blocks. In such cases, error correction and If you ignore the noise caused by the error because it is impossible to correct the error, this will become noticeable.

The present invention is intended to enable effective correction of large errors even when they occur successively in the block of signal 8c.

Therefore, considering the audio signal 8a, this audio signal 8a is a signal with relatively high redundancy, and has a high correlation, and for a short time, part of the audio signal am It has been found that if the missing part and the waveform in its vicinity are fitted into the missing part, it will not cause much of an audible problem and is a fairly effective error correction method for large errors.

This invention utilizes these points to perform error correction.
It is something.

An example of this will be explained below.

In FIG. 7, the signal Sc is continuously taken out from the amplifier (2I) one block at a time every period T1, as shown in FIG. In Figure 6, the block
Add a 0 sign. Further, in FIG. 6, it is assumed that many errors have occurred in the four boxes marked with an X, and it is impossible to correct the errors.

The signal 8c from the amplifier QB is sequentially supplied to a delay circuit constituted by, for example, a memory, and is supplied to the delay circuit 6.
] From J, for example, 1 unit period (1
/60 seconds) The delayed No. i Sd is pumped out and the delay circuit -
As shown in FIG. 6CK, a signal Se delayed by, for example, one unit period is extracted from the signal 8d. This signal 8e is then supplied to the decoder through a switch circuit (to be described later).

Also, amp 6! The signal Sc from υ is supplied to the error check circuit 64, and it is checked whether or not error correction is possible for one block of the signal 8c. If possible, @θ'', if not, 11. ” is taken out.

Therefore, in the signal 8c of FIG. 6A, the blocks ■~
0 error correction and error correction are impossible, in this case, the busy period becomes KPd=11'' from block ■ to block @ of the busy signal Sc as shown in FIG. When the block is finished, it becomes 10″9″11″, so Pd = “l” until the block ■ is finished.
”).

Furthermore, the signal 8d from the late cover circuit is supplied to the error check circuit (to), and the same 7 lag Pg is taken out.
That is, the flag Pe shown in FIG. 6EK is taken out.

These flags PdwPe are the logic circuit (to)
K Pf = Pd- as shown in Figure 6 FK.
A pulse Pf denoted by Pe is taken out, and this pulse P
Even though f is a decoder, is it a memory circuit (23 people)? (23B) is supplied as a write inhibit signal.

Also, the signal 8d from the delay circuit all is transmitted to the switch circuit (
), and the 6th
Figure G! As shown in lc, Fg = Pd-Pc tL pulse Pg is pumped out, and this pulse Pg (
or pulse Pe) is supplied as a control signal to the switch circuit, and the switch circuit (to) Pg = "Q"
When , it looks like the picture! 11.

According to such a configuration, Pg = 10 until time t2
``Therefore, the switch circuit - is in the state 1!! in the figure, and the signal 8e is supplied to the decoder ■.And, until time t1, Pf = ``'0'', so the memory circuit (23A)
Writing of the signal Se to 1 (23B) is permitted, and the 6th
As shown in FIG. HK, the signal 8e is written alternately to the mesh circuits (23A), (23B), and (K) in one block.

Then, at time tlK, Pf = "1", so writing to the memory circuit (23A) IC23B) is prohibited, and therefore, HKW1. As shown by II, 5tf'', blocks 2 to [phase] of the signal Se are no longer written.

That is, blocks (2) to (phase) with many errors are not written to the memory circuits (23A) and (23B).

Even more busy, at time t2, Pf becomes ``0'', and from then on, -6 writing to the memory circuit (23A) = (23B) is permitted, but for a period t! ~t3FC is Pg =
Since it is "1" during this period, the switch circuit - is connected in the opposite state as shown in the figure, and the signal Sd is supplied to the decoder (221). Therefore, as shown in FIG.
A) t(23B) For K, period t, ~t3 KG
! The signal 8d NOR'LOCK@ is written, and after time t3, blocks 0 and subsequent blocks of the signal 8e are written alternately.

Then, as shown in FIG. 6H for the memory circuit (23A) * (23B) K, the blocks ■~■1@~[phase]
is written, so this memory circuit (23A)
The block read from I (23B) is shown in FIG.
K will be shown. That is, the memory circuit (23A)
Reading for the meeting (23B) is performed alternately using the periods in which writing is not performed, but at time 11
Previously, blocks ■ to ■ were written alternately, so they are read alternately.

However, since no writing is performed during the period t1 to tiK, the last written block (1) is alternately and repeatedly read out from the memory circuit (23A) and (23B).

Then, block @ is written in the period t2 to t3,
After time t3, since the data is written sequentially starting from block @, block @ is read, and then blocks O~
[Phase] is read out alternately.

Therefore, from the memory circuits (23A) and (23B), blocks - [phase] are read out as shown in Fig. 6 I, and from the decoder, KP is read out as shown in Fig. 6 JK.
CM signal 8p is extracted. Then, this signal 8p passes through the error correction circuit (c) to the D/A converter (c).
and the audio signal is played back.

In other words, among the signals 8c, blocks ■~[
stock] is not used to reproduce the audio signal 8a, and the blocks before and after it ■! ■10 blocks with many errors■~[
This means that the audio signal 8m is played back.

Thus, according to the present invention, the audio signal 8a is reproduced from the PCM signal 8p, but in this case, especially according to the present invention, the reproduced PCM signal 8c has many errors, and the CRC, parity bit, etc. When error correction or error correction alone is not suitable for PCM demodulation, PCM demodulation is performed from the preceding and succeeding PCM signals 8C, so that it is possible to obtain the error-corrected audio signal Sa without causing any audible problems.

Furthermore, in this case, even if errors occur consecutively in several blocks of the signal 8c, since the errors are replaced by the blocks before and after, it is possible to obtain an audio signal with no audible problems.

Note that the first block after the error, block @
If the circuit is not used repeatedly, the delay circuit 62 and the switch circuit are not necessary.

Furthermore, when a block with many errors is substituted with the blocks before and after it, processing such as level manipulation may be performed to make the waveform joint of the audio signal 8m less noticeable at the joint between the blocks.

[Brief explanation of drawings]

1 to 6 are diagrams for explaining this invention, and FIG. 7 is a system diagram of an example of this invention. Noke reproducing decoder, (23A) * (23B) is a memory circuit, 61J-1 is a luck circuit, and 541e (to) is a 2-check circuit. Figure 2 Figure 4 Isshu C F5 6 Proceedings December 14, 1980 1. Display of the case 1988 Patent Application No. 3H117 2. Title of the invention Reproduction amount of audio signal 3. Amendment Relationship with the case involving the person who did the patent application Address of the patent applicant: Tokyo Parts Co., Ltd. 6-7-35 Name (21
8) Sony Corporation Representative Director Norio Ohga 4, Agent 1-8-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo (
Shinjuku Building) Tokyo (03) 343-5821 (Representative)
6. Number of inventions increased by amendment 7. Subject of the amendment Detailed explanation of the invention in the specification Section 8, Contents of the amendment In the specification, line 8 from the bottom of page 14, after "Can be done." Add the following. [Also, during playback, if the tape (2) is run faster than when it was recorded, a signal 8c K missing section will occur, but this missing section will be corrected in the same way, so the tape (2)
Search playback can be performed by running 2). I or more

Claims (1)

[Claims] When reproducing the audio signal from a recording medium in which the audio signal is converted into one program of a PCM signal for each predetermined period and recorded, the above-mentioned system has a memory for storing the reproduced PCM signal; Check the reproduced PCM signal for errors, and if this error exceeds the specified value ζ
and the PCM signal plotter that is causing this error,
A device for reproducing audio signals made to be modified using a plotter before or after it.