JPS58170077A - Semiconductor photodetector - Google Patents
Semiconductor photodetectorInfo
- Publication number
- JPS58170077A JPS58170077A JP57053077A JP5307782A JPS58170077A JP S58170077 A JPS58170077 A JP S58170077A JP 57053077 A JP57053077 A JP 57053077A JP 5307782 A JP5307782 A JP 5307782A JP S58170077 A JPS58170077 A JP S58170077A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- photodiode
- fet
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/222—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN heterojunction
Landscapes
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
(1)発明の技術分野
本発明は光通信用受光素子に係り、特に光波長1μm帯
で高感度な半導体受光装置に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a light-receiving element for optical communication, and particularly to a semiconductor light-receiving device with high sensitivity in the 1 μm wavelength band.
(2)技術の背景
近年、情報化社会の高度化に伴い、情報処理量の増大と
高速処理に対する要請が高まっている。(2) Background of the technology In recent years, as the information society has become more sophisticated, there has been an increasing demand for increased information processing volume and high-speed processing.
従って、有線及び無線の従来の通信方式では限界があり
、前述の要請に対応できなくなっている。Therefore, conventional wired and wireless communication systems have limitations and cannot meet the above-mentioned requirements.
−・方、従来のいわゆる電磁波領域を超えた遠赤外領域
より可視光におよぶ光通信方式が可干渉性の光源である
レーザ及びこれに対応する光通信用オプティカルファイ
バーその他の光回路素子の開発に佇い実用化の段階とな
りつつある。また光通信は高価で重要な銅線を必要とせ
ず、省資源、省エネルギーの点からも要望されている。- Development of lasers, which are coherent light sources for optical communication systems that extend beyond the conventional electromagnetic wave region, from the far infrared region to visible light, and corresponding optical fibers and other optical circuit elements for optical communications. It is now at the stage of practical application. Furthermore, optical communications do not require expensive and important copper wires, and are desired from the standpoint of resource and energy conservation.
このような背景からこの光通信領域におけるさらに低損
失。Against this background, even lower loss is needed in this optical communication area.
+I4i All率1低コスト等の技術的要望が高まっ
ている。+I4i There are increasing technical demands such as All rate 1 and low cost.
(3)従来技術と問題点
従来のフォトダイオードとPET(電界効果型トランジ
スタ)のモノリシック受光装置は半絶縁性基板を用いて
、この上にメサ型構造によって各素子間のアイソレーシ
ョンを行い、及び各電極を構成し°(いた。(3) Prior art and problems A conventional monolithic photodiode and PET (field effect transistor) photodetector uses a semi-insulating substrate, on which isolation between each element is provided by a mesa structure, and Each electrode was configured.
しかし、この種のメサ型素子ではフォトダイオ−1とF
E T間の接続を素子内配線により行うことが困難で
あり、さらに外部端子へのリード端子が増加する等の問
題がある。However, in this type of mesa type device, photodiode 1 and F
It is difficult to connect between ET by wiring within the element, and there are also problems such as an increase in the number of lead terminals to external terminals.
さらに、メサ型構造ではパソシヘーション(表面安定化
)の困難がある。換言すれば、従来一般に用いられてい
るメサ型のフォトトランジスタとFETを有する光通信
用受光装置は上述の通り、構造上の理由による複雑な配
線等生産技術−1−の問題と回路の特性上の制約と使用
上の安定度信頼性等の面で問題があった。Additionally, mesa-type structures have difficulties in passivation (surface stabilization). In other words, as mentioned above, the commonly used mesa-type phototransistor and FET optical communication light receiving device suffers from production technology-1 problems such as complicated wiring due to structural reasons and circuit characteristics. There were problems in terms of limitations and stability and reliability in use.
さらにP型のFETはホール(正孔)の小さなモビリテ
ィによるため高速の応答が得られない欠点があった。Furthermore, P-type FETs have the disadvantage that high-speed response cannot be obtained because of the small mobility of holes.
(4)発明の目的
本発明の目的は、この種の受光素子の構成をプレーナ型
とすることにより光通信用として必要な高信頼度で高感
度な受光装置を提供することである。(4) Object of the Invention An object of the present invention is to provide a highly reliable and highly sensitive light receiving device necessary for optical communication by using a planar type structure of this type of light receiving element.
(5)発明の構成
本発明の特徴とするところは、N型半導体基板上にN型
多元層を有し、その一部類域にP型埋め込み層を形成し
た後ルモ、さらにN型の層を形成し、先に形成したP型
埋め込み層に対向する一部のN型領域がアイソレーショ
ンされる如くP型層を形成したウェハにおいて、前記ア
イソレーション領域の内部にFET、及びこの領域の外
部にモノリシンクフォトダイオードを形成したプレーナ
構造の半導体受光装置にある。(5) Structure of the Invention The present invention is characterized in that it has an N-type multilayer on an N-type semiconductor substrate, and after forming a P-type buried layer in a certain area of the N-type semiconductor substrate, an N-type layer is formed. In a wafer in which a P-type layer is formed so that a part of the N-type region facing the previously formed P-type buried layer is isolated, an FET is placed inside the isolation region, and an FET is placed outside this region. It is a semiconductor light receiving device with a planar structure in which a monolithic photodiode is formed.
(6)発明の実施例 以下、本発明の一実施例を図面について説明する。(6) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.
第1図(a+乃至(flは、本発明の半導体受光装置の
製造方法を示す工程図である。FIG. 1 (a+ to (fl) are process diagrams showing a method of manufacturing a semiconductor light receiving device of the present invention.
基板となるN−1nP層1の上に液相エビタキンヤル(
1,1)E)法または気相エピタキシャル(VPL’、
)法により、濃度I X 10”cm−’で厚さ3〜5
μm程度にN−−1nGaAs (P)層2を成にさせ
る。(同図(a))
次に、後の工程においてFETを形成する領域にCd拡
散を行うため、たとえばホトレジスト4を薄く塗布し窒
化シリコン(Si:+Na)5等をマスクとして用いて
紫外光3による写真蝕刻法(フォトリソグラフィ)によ
りまず孔開けを施しく同図(bl)、その後例えば50
0 ”cで一時間カドミウノ、(Cd)の不純物を含む
ガス雰囲気中にて選択拡散を実施し、その後ホトレジス
ト4と窒化シリコン(Si2N4)5を除去することに
より埋め込み層6を形成させる。A liquid-phase Evita-kinyal (
1,1) E) method or vapor phase epitaxial (VPL',
) method with a thickness of 3 to 5 cm at a concentration of I
The N--1nGaAs (P) layer 2 is made to have a thickness of about .mu.m. ((a) of the same figure) Next, in order to diffuse Cd into the region where the FET will be formed in a later step, for example, a photoresist 4 is thinly applied and silicon nitride (Si:+Na) 5 is used as a mask to perform ultraviolet light 3. First, holes are made by photolithography according to the same figure (bl), and then, for example, 50 mm.
Selective diffusion is carried out in a gas atmosphere containing impurities of cadmium (Cd) for one hour at 0''C, and then the photoresist 4 and silicon nitride (Si2N4) 5 are removed to form a buried layer 6.
さらに再び液相エピタキシャル(L P E)法もしく
は気相エピタキシャル(V P E)法にて、N−In
P層またはN−1nGaAs (P)層7を約2μm成
長させる。(同図(C))
次に前述と同様の選択拡散技術により、約500℃で約
3時間カドミウム(Cd)の不純物を含むガス雰囲気中
にてカドミウム拡散を行い、フォトダイオード°受光部
8とアイソレーション部9に拡散を行う。(同図(d)
)
その後アイソレーション部9の中央部に再びカドミラJ
、(Cd)拡散を500℃のガス雰囲気中で約1.5時
間実施し、ゲート部(G) 10を構成する。Furthermore, by liquid phase epitaxial (L P E) method or vapor phase epitaxial (V P E) method, N-In
A P layer or N-1nGaAs (P) layer 7 is grown to a thickness of about 2 μm. (Same figure (C)) Next, using the same selective diffusion technique as described above, cadmium was diffused in a gas atmosphere containing cadmium (Cd) impurities at about 500°C for about 3 hours, and the photodiode Diffusion is performed in the isolation section 9. (Figure (d)
) After that, Kadmira J is placed again in the center of isolation section 9.
, (Cd) diffusion for about 1.5 hours in a gas atmosphere at 500° C. to form the gate portion (G) 10.
(同図(e))
最後にフAトダ・イオード部8及びゲート部(G)10
はA u / Z nにより、またフォトダイオードの
基板裏側11及びソース部(S)、ドレイン部(D)は
A u / G (3によりオーム性接触を形成させる
。((e) in the same figure) Finally, the A-to-da diode section 8 and the gate section (G) 10.
is formed by A u /Z n, and the back side 11 of the substrate of the photodiode, the source part (S), and the drain part (D) are formed by A u /G (3) to form an ohmic contact.
(同図(「))そして、フォトダイオードとゲート(G
)は金属配線により接続する。(Same figure (')) Then, the photodiode and gate (G
) are connected by metal wiring.
以上によって、受光装置がプレーナ型で構成でき、■、
つまたFETはNチャンネルを形成することが可能であ
る。With the above, the light receiving device can be configured as a planar type, and
A double FET can form an N-channel.
第2図は本発明の一実施例であるJ 、F 、E T型
の半導体受光装置の動作を示す説明図である。FIG. 2 is an explanatory diagram showing the operation of a J, F, and ET type semiconductor light receiving device, which is an embodiment of the present invention.
フォトダイオ−1部はN−1nP層7にカドミウム(C
d)注入P型層8を形成することにより製作する。The photodiode 1 part has cadmium (C) on the N-1nP layer 7.
d) Fabrication by forming an implanted P-type layer 8.
光伝送信号である例えば1.55μmの赤外光12を受
けとるのに通したバンドギヤ・7プを有する光ダイオー
ドにおける光吸収層すなわちのP型[8とN−1n G
a A s層2にて前記1.55umの赤外光を吸収
すると直ちに電子−正孔対が発生し、逆方向にあらかし
め電圧が印加されているため正孔11がに測の負電極方
向へ移動する。このため前記光ダイオードに電圧が発生
する。またJFETにおりるゲート部CG)と光ダイオ
ードとは接続されζいるために、光伝送信号によって発
生した電圧でJ P E Tの出力電圧を制御すること
ができる。A light absorbing layer, that is, a P type [8 and N-1n G
As soon as the 1.55 um infrared light is absorbed in the a As layer 2, electron-hole pairs are generated, and since the biasing voltage is applied in the opposite direction, the holes 11 are directed toward the negative electrode. Move to. Therefore, a voltage is generated across the photodiode. Furthermore, since the gate section CG) passing through the JFET and the photodiode are connected, the output voltage of the JPET can be controlled by the voltage generated by the optical transmission signal.
なお、前記(7) 、J F E Tは、P型拡散領域
13.13と本発明の特徴であるN−1n−GaAs層
2の上部にあらかじめ設けられた埋め込み層6すなわち
P型拡散領域によってソース部(S)とドレイン部(D
)はN−1nPjii7にて孤立化された島を形成し、
しかるに前記JFETはNチャネルをN−1nP屓7よ
りなるキャップ層に形成することが可能となった。しか
るに光伝送信号によって伝送された赤外光12にはフォ
トダイオードにて電圧を発生してゲート部(G)に印加
され“ζソース部(S)からトレイン部(D)へのドレ
イン電流(1o)が変調されることが可能である。Note that (7) above, JFET is formed by the P-type diffusion region 13.13 and the buried layer 6, that is, the P-type diffusion region, provided in advance on the top of the N-1n-GaAs layer 2, which is a feature of the present invention. Source part (S) and drain part (D
) forms an isolated island at N-1nPjii7,
However, in the JFET, it has become possible to form an N channel in the cap layer made of N-1nP layer 7. However, for the infrared light 12 transmitted by the optical transmission signal, a voltage is generated in the photodiode and applied to the gate part (G), causing a drain current (1o) from the source part (S) to the train part (D). ) can be modulated.
以上、上記本発明の一実施例において、P型拡散領域す
なわちフォトダイオード受光部8とアイソレーション部
9.9はCd拡散によって形成したが、例えばZn拡散
による場合には、拡散係数が速いため埋め込み屓6が上
がってくるのでN−・InGaAs層2に達していなく
とも、すなわち離接させて形成しても可能である。As described above, in the embodiment of the present invention, the P-type diffusion region, that is, the photodiode light receiving section 8 and the isolation section 9.9, are formed by Cd diffusion. Since the layer 6 rises, it is possible even if it does not reach the N-.InGaAs layer 2, that is, it can be formed in contact with and separated from the layer 2.
同図(blは上記半導体受光□装置を上方からみた乎’
ili図Tニア6゜光9’イオ−F(!
: J F F、TiJ:、ツー1電極14により図示
の如く素子内接続されている。The same figure (bl is the above semiconductor light receiving device viewed from above)
ili figure T near 6° light 9' Io-F (!
: JFF, TiJ:, are connected within the element by two-one electrodes 14 as shown in the figure.
以1−は、N−1nPを基板とした場合について述べて
きたが、第3図の如くN型ガリウムアンチモン(N−G
aSb)を基板とし、GaSbまたはGa八へsbを光
吸収層とする構成によって同様に作成しても可能である
。In the following, we have described the case where N-1nP is used as a substrate, but as shown in Figure 3, N-type gallium antimony (N-G
It is also possible to create the same structure using a substrate made of aSb) and a light absorption layer made of GaSb or GaSb.
なお、第3図においては基板となるN″″−〇aA S
15の十に、例えばN−−GaSb屓16とN−−G
a A I S b屓17を形成し、前記N−−Ga
(AI)Sbbl6の上部に埋め込み層6′を設け、ま
た前記N−CaAlSb屓17の中に光グイオート部8
゛とアイソレーション領域9′を形成させζ)。In addition, in Fig. 3, the substrate N''''-〇aA S
15, for example, N--GaSb 16 and N--G
a A I S b layer 17 is formed, and the N--Ga
(AI) A buried layer 6' is provided on the top of the Sbbl 6, and an optical guide portion 8 is provided in the N-CaAlSb layer 17.
and an isolation region 9' is formed ζ).
(7)発明の効果
本発明は前述の如〈従来一般に用いられたP型゛Ir導
体によるメサ型受光素子の欠点である、複雑な構造を採
用することに基づく生産性、安定度。(7) Effects of the Invention As mentioned above, the present invention improves productivity and stability due to the adoption of a complicated structure, which is a disadvantage of the mesa-type light receiving element using a P-type Ir conductor that has been generally used in the past.
信頼性等の問題を、N型半導体によるプレーナ構造をと
ることによって構造は簡単となり、このため生産性は向
上し、バッシヘーションが容易となり、この種の装置の
問題点である安定性/信頼度は向f、した。さらにN型
FET(電界効果型トランジスタ)とするごとにより光
感度および応答速度が改善される。By adopting a planar structure using an N-type semiconductor, the structure becomes simpler, which improves productivity, facilitates bashing, and solves problems such as reliability and reliability, which are problems of this type of equipment. The degree was in the direction of f. Furthermore, by using an N-type FET (field effect transistor), the photosensitivity and response speed are improved.
一般にこの種の化合物半導体においてはN型が得やすく
、N型のままFETを形成しうれば製造上も有利であり
、N型のため大きな電子移動度による高速応答が得られ
る等の特徴がある。In general, in this type of compound semiconductor, it is easy to obtain an N-type, and it is advantageous in terms of manufacturing if an FET can be formed as an N-type, and because it is an N-type, it has characteristics such as high-speed response due to large electron mobility. .
さらに比較的容易なP型拡散によってチャネル層である
N−rnF’を他から分離することによってF ti
TはN型のチャネルが構成でき、しかるに大きな相互コ
ンダクタンスが達成可能となり、所望の半導体受光素子
は高性能化が図れる効果を汀する。Furthermore, by separating the channel layer N-rnF' from others by relatively easy P-type diffusion, F ti
T can constitute an N-type channel, and accordingly a large mutual conductance can be achieved, and the desired semiconductor light-receiving device has the effect of achieving higher performance.
第1図ta+乃至(「)は、本発明半導体受光素子の製
造工程図、第2図は本発明の半導体受光素子の動作を示
す説明図、第3図は本発明の他の実施例である。
1・・・基板、 6.6′・・・埋め込み層、7・・・
キャップ層、 8,8′・・・フォトダイオードの受
光部、 9.9′・・・分離層、14・・・ゲート電
極、 17・・・キャンプ層。Figures ta+ to () are manufacturing process diagrams of the semiconductor light-receiving element of the present invention, Figure 2 is an explanatory diagram showing the operation of the semiconductor light-receiving element of the present invention, and Figure 3 is another embodiment of the present invention. 1...Substrate, 6.6'...Buried layer, 7...
Cap layer, 8, 8'... Light receiving part of photodiode, 9,9'... Separation layer, 14... Gate electrode, 17... Camp layer.
Claims (1)
P型埋め込み層を形成した後に、さらにN型の層を形成
し、先に形成したP型埋め込み層に対向する一部のN型
領域がアイソレーションされる如く該N型領域を囲むP
帯領域を形成し、前記アイソレーションされたN型領域
の内部にF ET、及びこの領域の外部にフォトダイオ
ードを形成したことを特徴とするプレーナ構造の半導体
受光装置。An N-type multi-layer is formed on an N-type semiconductor substrate, and after forming a P-type buried layer in one of the regions, an N-type layer is further formed, and a part facing the previously formed P-type buried layer is formed. P surrounding the N-type region so that the N-type region is isolated
1. A semiconductor light-receiving device having a planar structure, characterized in that a band region is formed, an FET is formed inside the isolated N-type region, and a photodiode is formed outside this region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57053077A JPS58170077A (en) | 1982-03-31 | 1982-03-31 | Semiconductor photodetector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57053077A JPS58170077A (en) | 1982-03-31 | 1982-03-31 | Semiconductor photodetector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58170077A true JPS58170077A (en) | 1983-10-06 |
Family
ID=12932734
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57053077A Pending JPS58170077A (en) | 1982-03-31 | 1982-03-31 | Semiconductor photodetector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58170077A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60218887A (en) * | 1984-04-13 | 1985-11-01 | Hamamatsu Photonics Kk | Semiconductor light detecting element |
| WO1993004345A1 (en) * | 1991-08-27 | 1993-03-04 | Graseby Plc | Detector for infrared radiation |
-
1982
- 1982-03-31 JP JP57053077A patent/JPS58170077A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60218887A (en) * | 1984-04-13 | 1985-11-01 | Hamamatsu Photonics Kk | Semiconductor light detecting element |
| WO1993004345A1 (en) * | 1991-08-27 | 1993-03-04 | Graseby Plc | Detector for infrared radiation |
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