JPS58190064U - 折畳式寝台 - Google Patents

折畳式寝台

Info

Publication number
JPS58190064U
JPS58190064U JP8698682U JP8698682U JPS58190064U JP S58190064 U JPS58190064 U JP S58190064U JP 8698682 U JP8698682 U JP 8698682U JP 8698682 U JP8698682 U JP 8698682U JP S58190064 U JPS58190064 U JP S58190064U
Authority
JP
Japan
Prior art keywords
legs
floorboard
floor plate
bed
folding bed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8698682U
Other languages
English (en)
Inventor
雄司 中野
Original Assignee
木村寝台工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 木村寝台工業株式会社 filed Critical 木村寝台工業株式会社
Priority to JP8698682U priority Critical patent/JPS58190064U/ja
Publication of JPS58190064U publication Critical patent/JPS58190064U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Tables And Desks Characterized By Structural Shape (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
図は本考案の一実施例を示すもので、第１図は使用状態
正面斜視図、第２図は構成並びに構成部材を示す底面側
説明的斜視図、第３図ａは脚を折り畳んだ状態の底面斜
視図、第３図すは梱包状態の斜視図、第３図Ｃは一時不
使用状態斜視図、第４図ａ、　　ｂは中間部床板の脚の
折り畳み並びに立設状態を示す二部拡大底面斜視図であ
る。 符号１・・・頭側床板、２・・・足側床板、３・・・中
間部床板、４．　５．　６・・・脚、７．１０・・・支
持杆、８゜９・・・連結杆、１１．１２・・・取付片、
１３・・・ちょうボルト、１４・・・掛金、１５・・・
キャスター、Ａ・・・寝台。

Claims (1)

    【実用新案登録請求の範囲】
  1. 頭側床板と、足側床板と、それらの間の幅狭の中間部床
    板とを夫々屈曲自在に連結すると共に、夫々の床板に脚
    を取り付け、前記頭側床板と足側床板の脚は寝台の長手
    方向に回動させて夫々の床板の下側に折畳自在に構成す
    ると共に、中間部床板の脚は寝台の短手方向に回動させ
    てその床板の下側に折畳自在に構成したことを特徴とす
    る折畳式寝台。
JP8698682U 1982-06-11 1982-06-11 折畳式寝台 Pending JPS58190064U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8698682U JPS58190064U (ja) 1982-06-11 1982-06-11 折畳式寝台

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8698682U JPS58190064U (ja) 1982-06-11 1982-06-11 折畳式寝台

Publications (1)

Publication Number Publication Date
JPS58190064U true JPS58190064U (ja) 1983-12-17

Family

ID=30095739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8698682U Pending JPS58190064U (ja) 1982-06-11 1982-06-11 折畳式寝台

Country Status (1)

Country Link
JP (1) JPS58190064U (ja)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6893916B2 (en) 2001-06-15 2005-05-17 Hrl Laboratories, Llc Programmable connector/isolator and double polysilicon layer CMOS process with buried contact using the same
US6897535B2 (en) 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US6919600B2 (en) 2001-06-15 2005-07-19 Hrl Laboratories, Llc Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
US7166515B2 (en) 2000-10-25 2007-01-23 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US7217977B2 (en) 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US7294935B2 (en) 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
US7514755B2 (en) 2002-12-13 2009-04-07 Hrl Laboratories Llc Integrated circuit modification using well implants

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7166515B2 (en) 2000-10-25 2007-01-23 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US7294935B2 (en) 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
US6893916B2 (en) 2001-06-15 2005-05-17 Hrl Laboratories, Llc Programmable connector/isolator and double polysilicon layer CMOS process with buried contact using the same
US6919600B2 (en) 2001-06-15 2005-07-19 Hrl Laboratories, Llc Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6897535B2 (en) 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US7008873B2 (en) 2002-05-14 2006-03-07 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
US7344932B2 (en) 2002-11-22 2008-03-18 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
US7514755B2 (en) 2002-12-13 2009-04-07 Hrl Laboratories Llc Integrated circuit modification using well implants
US7217977B2 (en) 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US7541266B2 (en) 2004-04-19 2009-06-02 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable

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