JPS5819008A - amplifier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier using field effect transistors,
The purpose of this is to reduce the noise of the amplifier itself.

Generally, an amplifier using a field effect transistor is constructed as shown in FIG. In FIG. 1, the field effect transistor 9 has its gate connected to the input terminal 1 and grounded via a bias resistor 7vf, and the drain of the field effect transistor 3 is connected to the positive power supply terminal 4 via a bias resistor 8f. and connect to output terminal 2,
Negative power supply terminal 5 via the above field effect l/range star
is connected to. It is known that the saturation drain current of the field effect transistor 3 varies greatly from element to element, and furthermore, the saturation drain current changes greatly depending on the temperature. Therefore, in the above-mentioned amplifier, in order to operate so that the DC drain current of the field effect transistor 3 is constant, variations in the elements are avoided at the time of design.
Considering all temperature characteristics, bias resistor 6. A, 8 are set appropriately. On the other hand, the above-mentioned amplifiers are often required to have low noise. The noise level of the field effect transistor 3 increases in proportion to J] when its mutual conductance is μ. Therefore, in order to reduce the noise, the field effect transistor 3 should be set in a state where the mutual conductance is large. Therefore, as shown in FIG. 2, the field effect transistor 3 has an operating point at point A where the drain current air and the mutual conductance, □□□, are maximum and the drain-source voltage VGS is at O potential. It is necessary to set it to have .

However, in the amplifier described above, as mentioned above, the operating point 'k of the field effect transistor 3 is kept constant, and the possible saturated drain circulation is Since it is necessary to keep the drain undercurrent small, it is impossible to use a field effect transistor with a saturated drain current, and it has therefore been difficult to achieve low noise.

Non-invention eliminates these conventional drawbacks,
The present invention will be described below with reference to drawings of embodiments.

FIG. 3 shows an embodiment of the amplifier of the present invention.
In the figure, the field effect transistor 13 has its gate connected to the input terminal 11 and grounded via the bias resistor 17, and its drain connected to the positive power supply terminal 19 via the bias resistor 18, and the output terminal 12.
Connect to σ. It is connected to the emitter of the transistor 16 of the field effect transistor 13 via a bias resistor 16.

In addition, the source of the field effect transistor 13 is connected to the positive input terminal of the differential amplifier 22 which is grounded, and the capacitor 21 is connected between the negative input terminal and the output terminal of the differential amplifier 22.
is connected to the input terminal of the DC inverting amplifier 14, and the output terminal of the DC inverting amplifier 14 is connected to the above P
Connected to the base of NP transistor 15.

In the amplifier having such a configuration, the gate potential of the field effect transistor 13 is set to approximately a DC potential by the bias resistor 17. Now, if the source potential of the field effect transistor 13 rises due to some lateral cause, the emitter current of the DC inverting amplifier transistor 15 is fully boosted.

Therefore, the DC inverting amplifier 14 acts to lower the source potential of the field effect transistor 13. At this time, the source potential of the field effect transistor 13 is stabilized at the potential because the amplification degree of the DC inverting amplifier 14 is high. On the other hand, the field effect transistor 13
If the source potential of the PN drops for some reason, the output of the DC inverting amplifier 14 rises by one level, and the output becomes the same as the PN.
P added to the base of transistor 15 and the above PNP
) The emitter current of transistor 15 is completely reduced. Therefore, the DC inverting amplifier 14 acts to raise the source potential of the field effect transistor 13, and stabilizes the source potential of the field effect transistor 13 at the full potential. As a result of such an action, the field effect transistor 13 is not affected by variations in the field effect transistor 13 itself or temperature changes, and the potential between the source and gate is always maintained.

Incidentally, the amplifier of this embodiment described above is normally used as a first-stage amplifier configured with multiple levers. In this case, since the amplifier of this embodiment operates with the sum drain current, its mutual conductance ym is extremely large. Therefore, the equivalent noise resistance (R: 2/3
1/Pn) and the output impedance, and is particularly effective as a primary amplifier.

Further, in the above embodiment, a PNP is used as a variable impedance element for controlling the source potential of the field effect transistor 13.
) Although the transistor 15 is used, this variable impedance element may be used in place of the NPN) transistor.

In this case, the NPN transistor may have its emitter connected to the load power supply terminal 20 and the collector connected to the source of the field effect transistor 13 via the total bias resistor 17.

According to the present invention, as described in (2) above, all variable impedance elements are connected to the source of the field effect transistor (2), and the output of the DC inverting amplifier connected to the source of the field effect transistor is input to the variable impedance element, I',
',We field effect l・U/divide the source potential of the transistor
Since the above field effect transistor C
:It can operate with a saturated drain current without being affected by variations in each confectionery or temperature changes, and can achieve low noise.

[Brief explanation of drawings]

Figure 1 is an electrical circuit diagram of a conventional amplifier, Figure 2 is an explanatory diagram of the operation of a field effect transistor used in the amplifier,
The 30th is an electrical connection diagram showing one embodiment of the amplifier of the present invention. 13... Field effect transistor, 14...
...DC inverting amplifier, 16...variable impedance resistor. Name of agent: Patent attorney Toshio Nakao and 1 other person
35 - Procedural Amendment Showa (1987) Patent Application No. 116981 2 Name of the invention Amplifier 3 Relationship with the person who corrects the sleeve permission
Appointment Address 1006 Oaza Kadoma, Kadoma City, Osaka Name (582) Representative of Matsushita Electric Industrial Co., Ltd.
Toshihiko Yamashita 4 Agent 571 Address 1006 Oaza Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. Claims column of the specification subject to the 5th amendment Detailed description of the invention column of the specification Drawing 6 , Contents of amendment 1 The claims column of specification 1 is amended and deleted as shown in the attached sheet. 2 Correct the source of ``through'' in the 2nd line of the 2nd page to -1 through the bias resistor 6. ,...
has been done. ``Also,'' the source of the field effect transistor 13 is the DC inverting amplifier 14''
2. Snow −φle J
It is connected to the input terminal of Mourning - 翫社圠 n 福士 4 孟,
- The output terminal of the DC inverting amplifier 14 is connected to the base of the PNP) run raster 150. The DC inverting amplifier 14 has a positive input terminal connected to it, a capacitor 21 connected between the negative input terminal and the output terminal, and a field effect transistor 13 connected to the negative input terminal via a resistor 23.
It consists of a differential amplifier 22 connected to the source of. ” will be corrected. 4 Correct and change "Initial amplifier" on the 9th line of page 6 of the same page to "Initial stage amplifier". 6 In the same page, page 6, lines 16 to 18, "...may be good....may be good." ) (connected to the load power supply terminal T20 via an ear resistor, and the collector connected to the source of the field effect transistor 13. In this case, the DC inverting amplifier 14 is changed to a DC non-inverting amplifier and its output terminal can be connected to the base of the NPN) transistor. ” will be corrected. 6. Correct Figure 3 of the drawing as shown in the attached sheet. Figure 3

Claims (1)

[Claims] A variable impedance element is connected to the source of the field effect transistor, and the variable impedance element is controlled by the output of a DC inverting amplifier connected to the source of the field effect transistor to stabilize the gate-source voltage of the field effect transistor. An enlarger characterized by being configured as follows.