JPS58201156A - Trouble processing system - Google Patents
Trouble processing systemInfo
- Publication number
- JPS58201156A JPS58201156A JP57085537A JP8553782A JPS58201156A JP S58201156 A JPS58201156 A JP S58201156A JP 57085537 A JP57085537 A JP 57085537A JP 8553782 A JP8553782 A JP 8553782A JP S58201156 A JPS58201156 A JP S58201156A
- Authority
- JP
- Japan
- Prior art keywords
- data
- trouble
- input
- information
- failure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
Description
【発明の詳細な説明】
(1) 発明の技術分野
本発明は情報処理システムにおける障害処理方式に係り
、特に入出力装置又は入出力制御装置に障害が発生した
場合、生起されたセンス情報(5ense i?報)を
当該障害装置内に出力し障害解析手段全提供する方式に
関する。Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to a failure handling method in an information processing system, and in particular, when a failure occurs in an input/output device or an input/output control device, generated sense information (5 sense This invention relates to a system for outputting information (i.e. information) into the faulty device and providing full fault analysis means.
(2)従来技術の問題点
従来、入出力装置(No)や入出力制御装置(工00
)に障害が発生すると、Sl!!NSK情報としてcp
aへの転送データを作成し、CPUへ転送して、該CP
U側では一括して集中的に障害情報を磁気ディスク等に
設けた障害累積ファイルに記録保持したり、当該ファイ
ル全アクセスし障害解析資料全提供する方式が一般的で
あった。該従来方式では、全装置に対する障害処理シス
テムが確立していればよいが、各装置毎に例えば他メー
カ等の様々な装置が組込まれた情報処理システムの場合
、完全な総合的な障害処理システムが作れず、従って各
装置の障害処理が迅速にかつ適切に行なえないという欠
点があっ几。(2) Problems with conventional technology Conventionally, input/output devices (No.) and input/output control devices (No.
), when a failure occurs in Sl! ! cp as NSK information
Create transfer data to a, transfer it to the CPU, and
On the U side, it has been common practice to centrally record failure information in a failure accumulation file provided on a magnetic disk or the like, or to access all of the files and provide all failure analysis materials. In this conventional method, it is sufficient to establish a fault handling system for all devices, but in the case of an information processing system in which each device incorporates various devices, for example, from other manufacturers, a complete comprehensive fault handling system is required. However, there are many disadvantages in that it is not possible to create a system, and therefore troubleshooting problems in each device cannot be done quickly and appropriately.
(3)発明の目的
本発明ll″l:前記欠点を解消して、情報処理システ
ムにおける入出力装置と入出力制御装置の単体としての
保守が充分可能となる方式を提供することを目的とする
。(3) Purpose of the Invention The present invention ll''l: An object of the present invention is to provide a method that eliminates the above-mentioned drawbacks and makes it possible to sufficiently maintain the input/output device and input/output control device as individual units in an information processing system. .
(4)発明の構成
該目的は、周辺装置の障害情報全中央処理装置に送り処
理するシステムにおいて、前記周辺装置に障害が発生し
た場合に、必要な障害情報を収れる。(4) Structure of the Invention The object is to store necessary failure information when a failure occurs in a peripheral device in a system that sends failure information of peripheral devices to all central processing units for processing.
(5)発明の実施例 以下図面を用いて本発明の詳細な説明する。(5) Examples of the invention The present invention will be described in detail below using the drawings.
図は本発明の一実施例を示すブロック図である。The figure is a block diagram showing one embodiment of the present invention.
図において、lは中央処理装置(CPU)、2は入出力
制御装置(IOC)、3は入出力装置、4は入出力制御
機構、5はバッファ、6はプリンタ。In the figure, l is a central processing unit (CPU), 2 is an input/output control device (IOC), 3 is an input/output device, 4 is an input/output control mechanism, 5 is a buffer, and 6 is a printer.
7はタイマー・カレンダー機構、8はセンス情報経路、
9は制御信号経路である。7 is a timer/calendar mechanism, 8 is a sense information path,
9 is a control signal path.
ここで2,3は周辺装置ともいう。Here, 2 and 3 are also called peripheral devices.
入出力装f3または工002の障害を障害のチェック回
路(図示されていない。)が検出すると、入出力制御機
構4は、動作環境情報等と合せて、センスガータを作成
し、バッファ5に蓄積するとともにタイマー・カレンダ
ー機構フに0PUIより障害時の日付と時刻の読取!I
n行う。その後、プリンタ6に16進数(又は10進a
)で日付と時刻、障害発生装置の物理機番および前記セ
ンスガータをプリントアウトし、該バッファ5の内容金
クリアする。従来方式との互換性全必要とする場合は、
プリントアウトの後膣バッファ5のクリアする際、CP
Uからのセンスデータのa取ジ依頼や、リセット指示が
来るまで該バッファ内容を保留状態としておいてもよい
。さらにセンスデータの選択回路金付卵すれば、必要な
データのみ選択的にプリントアウトもできる。またプリ
ンタの性能全高めたり、工002内のマイクロプログラ
ムの処理機能金高めて該センス情報全解析し、障害発生
のプリント仮名や障害修理の手掛りとなる情報全リテラ
ル形式で表示させることもできる。When a failure check circuit (not shown) detects a failure in the input/output device f3 or the device 002, the input/output control mechanism 4 creates a sense gutter along with operating environment information, etc., and stores it in the buffer 5. Along with the timer/calendar mechanism, you can read the date and time at the time of failure from 0PUI! I
Do n. After that, the hexadecimal number (or decimal a) is sent to the printer 6.
), print out the date and time, the physical machine number of the failed device, and the sense gutter, and clear the contents of the buffer 5. If you require full compatibility with conventional methods,
When clearing vaginal buffer 5 after printing out, CP
The contents of the buffer may be held in a suspended state until a sense data retrieval request or reset instruction is received from U. Furthermore, if you use the sense data selection circuit, you can selectively print out only the necessary data. It is also possible to fully improve the performance of the printer or increase the processing capabilities of the microprogram in the machine 002 to analyze all of the sense information and display all of the information in literal format, such as the print pseudonym of the occurrence of the problem and information that will provide clues for repairing the problem.
(6) 発明の詳細
な説明したように本発明によれば、■ 障害時の5EN
SK情報が発生の都度当該装置のプリンタに出力される
ため、障害累積ファイル金持たなくても済む、17jは
その容ti削減することができる。(ID 0PUK
障害が発生した場合やCPUが利用できない場合におい
ても障害累積情報がIOCのプリンタに出力されており
障害累積ファイルが利用できない状態が回避できる。[
株]障害累積ファイル関係に障害が発生し、累積された
障害情報が利用できなくなることがない。[株]apt
yでは、障害処理のための入出力動作が省略でき負荷が
軽減されるため、パフォーマンスが向上する。■ オペ
レータが定期的に、障害累積ファイル全出力処理する作
業が削減でき、オペレータの手間が軽減できる。■ 必
要なセンスガータを選択してプリントアウトができ、オ
ペレータの判断がさらに軽減できる効果がある。(6) According to the present invention as described in detail, ■ 5EN at the time of failure
Since the SK information is output to the printer of the device each time it occurs, the 17j can reduce the amount of failure accumulation file money required. (ID 0PUK
Even when a failure occurs or the CPU is unavailable, the failure accumulation information is output to the printer of the IOC, making it possible to avoid a situation in which the failure accumulation file cannot be used. [
Stock] Accumulated failure information will not become unusable due to a failure occurring in the failure accumulation file. [stock] apt
In y, performance is improved because input/output operations for failure handling can be omitted and the load is reduced. ■ The work of the operator to periodically process the entire output of the failure accumulation file can be reduced, reducing the operator's effort. ■ It is possible to select and print out the necessary sense gutter, which has the effect of further reducing operator judgment.
図は本発明の一実施例を示すブロック図である。 The figure is a block diagram showing one embodiment of the present invention.
Claims (1)
テムにおいて、前記周辺装置に障害が発生した場合に、
必要な障害情″J&を収集し、編集して出力表示する手
段を当該周辺装置に設けたことを特徴とする障害処理方
式。In a system that sends peripheral device failure information to a central processing unit for processing, when a failure occurs in the peripheral device,
A failure handling method characterized in that the peripheral device is provided with means for collecting necessary failure information "J&", editing it, and outputting and displaying it.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57085537A JPS58201156A (en) | 1982-05-20 | 1982-05-20 | Trouble processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57085537A JPS58201156A (en) | 1982-05-20 | 1982-05-20 | Trouble processing system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58201156A true JPS58201156A (en) | 1983-11-22 |
Family
ID=13861623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57085537A Pending JPS58201156A (en) | 1982-05-20 | 1982-05-20 | Trouble processing system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58201156A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5140045A (en) * | 1974-10-02 | 1976-04-03 | Hitachi Ltd | Seigyosochino eraajohoshitsuryokuhyojihoshiki |
| JPS5341958A (en) * | 1976-09-29 | 1978-04-15 | Toshiba Corp | Trip sequence memory unit |
| JPS5530735A (en) * | 1978-08-25 | 1980-03-04 | Hitachi Ltd | Input/output control device |
-
1982
- 1982-05-20 JP JP57085537A patent/JPS58201156A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5140045A (en) * | 1974-10-02 | 1976-04-03 | Hitachi Ltd | Seigyosochino eraajohoshitsuryokuhyojihoshiki |
| JPS5341958A (en) * | 1976-09-29 | 1978-04-15 | Toshiba Corp | Trip sequence memory unit |
| JPS5530735A (en) * | 1978-08-25 | 1980-03-04 | Hitachi Ltd | Input/output control device |
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