JPS58202609A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To reduce the variation of current amplification degree although this degree has a fluctuation in a region where the current amplification factor is small, by adding a transistor(TR) to a conventional current mirror circuit. CONSTITUTION:The emitters of TRs Q21 and Q22 are connected in common to each other, and this common joint is connected to a power supply terminal 21. The bases of TRs Q21 and Q22 are connected in common to each other, and the collector of the TRQ21 is connected to an input terminal 22 along with the collector of the TRQ22 connected to an output terminal 23 respectively. Then the emitters of TRs Q23 and Q24 are connected to the common joint of the bases of TRs Q21 and Q22. The bases of TRs Q23 and Q24 are connected in common, and this common joint is connected to the collector of TRQ23. The common joint of the collector and the base of TRQ23 is connected to the terminal 22, and the collector of TRQ24 is connected to the terminal 23. The current amplification factor A is decided by the ratio between an output current I2 and an input current I1 as shown in an equation, where alpha is the current amplification factor and (a) and (m) show the emitter area ratios respectively. Thus the degree of improvement can be confirmed for the current amplification degree from the relation between the current amplification factor and the current amplification degree.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a current mirror circuit that is frequently used as a constant current circuit or a current amplification circuit.

[Technical background of the invention]

When configuring various circuit systems, constant current circuits and current amplification circuits are often required. When converting such a circuit system into a semiconductor integrated circuit (hereinafter referred to as an IC), a current mirror circuit is often used as the constant current circuit or current amplification circuit. That is, the current mirror circuit is ideally a circuit that can obtain an output current equal to the input current. Therefore, if the input current is fixed, an output current at a constant level can always be obtained, so the current mirror circuit can be used as a constant current circuit.

Furthermore, by making the input current variable, it is possible to obtain an output current that always follows fluctuations in the input current, so the current mirror circuit can be used as a current amplification circuit.

Basically, the current mirror circuit is as shown in Figure 1.
Transistor Qlt r Q12 with two similar characteristics
It is composed of a combination of. In this case, transistor Q
A voltage of the same level as the reference potential terminal 10 is applied to the pace-emitter junction of 1t+Q12. This causes almost equal current to flow in the emitter of the transistor (ht r Q12. Now, the transistor Qo
#If the current amplification factor β when the emitter of Qu is grounded is sufficiently large, the difference in base current of the transistor Qll r Q12 can be ignored. Therefore, under these conditions, the input current 1 flowing to the input terminal 11 and the output current 2 flowing to the output terminal 12 are almost equal. And this state is each transistor Qo + Qtg
In this case, it depends on the ratio of their areas. By the way, when the current mirror circuit is implemented as an IC, it is easy to set the ratio of the emitter areas of each transistor Qo + Qla to a constant value. Therefore, when implementing a current mirror circuit into an IC, as long as the current amplification factor β of transistors Qo and Q12 can be made to a sufficiently large value, the input current I can be reduced.

It is possible to realize a current mirror circuit in which the output current I2 and the output current I2 are approximately equal to each other.

In the above explanation, the case where the current amplification degree (A=T'-) of the current mirror circuit (2) is 1 has been explained, but the same can be said for the case where the current amplification degree (A=T'-) is set to a other than 1. In this case, in order to make the current amplification degree (4) a, for example, the ratio of the emitter areas of transistors Qo and Q12 in FIG. 1 may be set to 1:&. therefore,
If the current amplification factor @ of transistors Q11+Q12 can be increased, the current amplification factor (4) can be reduced to a(a)1
), this value can always be secured.

However, when the current amplification factor (1) is small, the difference in pace current of the transistors Q1t + Qt□ cannot be ignored, and the current amplification factor (4) changes in accordance with the fluctuation of the current amplification factor.

[Problems with background technology]

By the way, when converting a transistor into an IC, the current amplification factor (J/) can be made relatively large if an NPN Lanzoster is used as the transistor. However, when using a PNP transformer,
It is difficult to increase the current amplification factor. This is due to the following reasons.

When converting transistors into ICs, NPN (npn) transistors are mainly formed by forming an N-type epitaxial layer on a P-type substrate. Therefore, PNP) transistors (usually lateral PNP) made by this same process
NP) transistors cannot obtain sufficient characteristics compared to NPN) transistors. especially,
The current amplification factor (β) is small and tends to vary easily. The width of the variation may be as small as 2 to 3 (current amplification factor when the emitter is grounded), and on the large side, it may be about several dozen. For this reason, when configuring various circuit systems, PN is used as a transistor.
Even if it is convenient to use P) transistors, the use of PNP transistors may reduce the performance of the circuit system.

FIG. 2 is a circuit diagram in which a current mirror circuit is constructed using PNI) transistors. The operation of this circuit 5- is the same as in the case of FIG. 1, so a description thereof will be omitted. Now, let's find the current amplification degree (4) in Figure 2.

First, in the same figure, transistor Qls + Q14
are transistors manufactured on the same chip and having the same characteristics. Let the input current and output current of the input terminal 11 and the output terminal 12 be Il + I2, respectively. Now, assume that the ratio of the emitter and rear areas of the transistor Qu r Q10 is 1:1. Further, if each emitter current is Ir, the current 11+I2 is expressed by the following equations (1) and (2), respectively.

From equations (1) and (2), the current amplification degree (4) is calculated by the following equation (3
).

β In equation (3), if the current amplification factor (β) is large, the following term becomes approximately zero, and this term can be ignored. Therefore, even if the current amplification factor (β) varies, as long as this W and current amplification factor (β) are large, the current amplification factor (4)
is always constant. In this case, the current amplification degree ■ is always 1, and an output current I2 equal to the input current ■1 can be obtained.

On the other hand, if the current amplification factor (β) is small, 27. cannot be ignored, and if the current amplification factor (β) varies, the current amplification factor (4) will also vary. FIG. 3 is a characteristic diagram showing the relationship between the current amplification amount (β) and the current amplification degree (4), and particularly shows the characteristics in a region where the current amplification factor (β) is small.

As shown in the figure, when the current amplification factor (β) is small, the slope of the characteristic curve is large, and if the value of the current amplification factor (β) changes even slightly from a certain value, the current amplification factor (4) changes greatly. do. Now, if we look at the current amplification factor (4) when the current amplification factor (β) is 20 and 2, each is about 0.909.
, 0.5 (current amplification factor (β) is 2'11:
case is not shown). From this, the current amplification factor (N is the current amplification factor (β)) when the current amplification factor (β) is 2.
It can be seen that the number is reduced by 45 inches compared to the case where the number is 20. Moreover, in this case, transistor Q! 3゜Q14
Due to the difference in pace current, the current amplification degree (4) deviates greatly from the set ideal value 1.

In this way, if the current amplification factor (β) of transistors Q13+Q14 varies in a small region, the current amplification factor (A)
It is not possible to obtain a uniform current mirror circuit, and the current amplification degree (4) also deviates greatly from the set ideal value. Therefore, the current amplification degree (4)
When using a current mirror circuit whose values are non-uniform and far from ideal values as a constant current circuit or a current amplification circuit, it becomes difficult to design the circuit system.

Note that the current amplification factor (β) naturally varies during the process of IC fabrication, but may also vary due to temperature changes.

[Object of the invention].

(1) This invention was made to deal with the above-mentioned circumstances, and even when the current amplification factor of the transistor is small, it is possible to reduce the fluctuation of the current amplification degree, and it is also possible to bring yM close to the ideal value, and furthermore, it is possible to The purpose of this invention is to provide a current mirror circuit suitable for

[Summary of the invention]

In this invention, the first current path extends from the common connection point side of the first transistor to the collector side of the first transistor, and the second current path extends from the common connection point side of the first transistor to the collector side of the first transistor. A shunt circuit having a second current path leading to the collector side of the transistor is provided. Furthermore, the impedance ratio of the first and second current paths is set to be variable.

With this configuration, the current flowing through the common connection point of the paces is the first. The current flows not only through one collector of the second transistor, but also through the other collector, and moreover, the current flows through the collector of the first transistor. The current flowing through the second current path is controlled by changing the ratio of impedances of the biventricular flow paths. In this case, the first. If the current flowing through the second current path is set appropriately, the current amplification factor will not be affected by the current amplification factor even if the current amplification factor of the transformer is small and fluctuates due to the influence of temperature, etc. There will be no.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 4 is a circuit diagram of an embodiment of the present invention.

In the figure, the emitters of transistors Q211Q2□ are commonly connected, and the common connection point is connected to a power supply side terminal (reference potential terminal) 21. Transistor Q21T
The pace of Q2□ is common. transistor Q
The collector of the transistor Qzz is connected to the input terminal 22, and the collector of the transistor Qzz is connected to the output terminal 23.

The emitters of transistors Q23 + Q24 are connected to the common connection point of the paces of transistors Q21 + Q22. Transistor Q23. The paces of Q24 are connected in common, and their common connection point is connected to the collector of transistor Q23. The common connection point between the collector and the pace of transistor Q23 is connected to input terminal 22 and 10
- There is. The collector of transistor Q24 is connected to output terminal 23.

The operation in the above configuration will be explained. In FIG. 4, the ratio of the emitter areas of transistor Q21 and transistor Q22 is 1:&. This means that, as described above, when the current mirror circuit is configured in an ideal state, the current amplification degree (4) of the circuit is a.

In this state, the emitter current of Llanzostar Q21 is changed to I
I, the emitter of transistor Q22 has aiz
An emitter current of flows. Here, transistor Q21
+ If the current amplification factor of pace grounding of Qzt is α, then
Collector current Icl of transistor Q21 r Q22
r I(!2 is represented by the following equations (4) and (5), respectively.

IC,=αII ・・・・・・・・・・・・・・・
・・・(4) Ic2−αaIz ・・・・・・・・・・・・
・・・・・・・・・(5) Also, the transistor Q21 +
The pace currents IB1 r IB2 of Q22 are expressed by the following equations (6) and (7), respectively.

Ia1=(1-α)IN+ ・・・・・・・・・・・・
(6) IB, = (1-α)aIz・・・・・・・・・
(7) From equations (6) and (7), the total current IB3 of both pace currents I'll and InI3 is expressed by the following equation (8).

IB3=(1-αX1+IL)IE -=-...'(8
) Figure 5 shows the transistors Q23゜Q24 in Figure 4.
FIG. 2 is a circuit diagram showing an extracted circuit portion consisting of When terminals 24 to 26 are provided as shown in FIG. 5, the circuit portion shown in FIG. 5 can be regarded as a composite transistor corresponding to an emitter, a pace, and a collector, respectively.

Now, assuming that the ratio of the emitter areas of transistors Q23 and Q24 is m:1, the equivalent current amplification factor (αm) of the above-mentioned composite transistor is expressed by the following equation (9).

αm＝”−α ・・・・・・・・・・・・・・・・・・
(9) 1+m However, α: Current amplification factor of the pace grounding of transistor Q, 23 s Q24.

Further, when terminals 24 to 26 are provided as shown in FIG. 5, the composite transistor transfers the current flowing into terminal 24 to terminal 25.
26 can be considered as a shunt circuit.

Here, terminal 25. Let's find the current distributed to J16. The above-mentioned total current ■B3 flows into the terminal 24.

This total current IB is the transistor Q23 + Q24
are distributed to the emitters of

Emitter current IN of transistor Q2s + Q24!
B rl and b are each expressed by the following formula αI, (11).

r,, i+m (1d)(N-a)I+c ・
・・・・・・・・・・・・・・・α11mb=” (1
−αX1+a) Iz・・・・・・・・・・・・α
In addition, the collector currents xc and +Icb of the transistors Q23 + Q24 are respectively expressed by the following equations (6) and α].

IcB=”(1-α)(1+a)rg ・・・・・・・・・
・・・・・・Revenge■1+11 α Icb=〒+m(1 penalty)(1+a)Im ・・・・・・
・・・・・・・・・α] Also, the transistor Qzs r
The pace current IBm + "b of Q114 is expressed by the following equations α◆ and α啼, respectively.

13- IBa=Cod 〒(1-α)2(1+a)IB・・・・・・
・・・・・・α→IBb-book (1-α)2(1+a)I
z ・・・・・・・・・・・・(b) Therefore, the total current IB of the pace of transistors Q23 + Q24
c is expressed by the following formula αQ.

IB(4=InB+Iab=(1-α)2(1+a)IH・・・・・・・・・・・・
. . . α・As a result, the total current Icd of the currents IC and IB flows into the terminal 25.

In addition, the terminal 26 has a current I expressed by the above-mentioned 2αQ.
+4. flows.

The currents distributed to the terminals 25 and 26 in this way are the collector currents I of the transistors Q21 r and Q22, respectively.
It is summed as CI+Ic2 and flows to the input terminal 22 and output terminal 23. If the currents flowing through the input terminal 22 and the output terminal 23 are It+I2, they are expressed by the following equations (to) and (to), respectively.

14- I2-αm I E+ -(1-(t) (1+a
) I K ・・・・・・・・・・・・・・・・・・
...Tsukuda 1+m Formula θ mark, θ combination The current amplification degree (4) of the current mirror circuit in FIG. 4 is expressed by the following formula.

In the equation, the term -α is the basic current amplification factor (αm) of the composite transformer 1 +m transistor. Now K this
When m (1 is set, equation (e) is expressed by the following equation 91).

A=Yunsouyu&Zeng~Ding Qme'1:1 Note that the relationship between the current amplification factor (α) of the pace grounding of the transistor Q2t''Qz+ and the current amplification factor (J/) of the emitter grounding is expressed by the following formula) holds true.

Here, according to equations (c) and (2), if Km (= stone;) is set to 4 parameters and the relationship between current amplification factor (β) and current amplification factor (shu) is determined, the relationship between current amplification factor (β) and current amplification factor (shu) is obtained as shown in Figure 6. This is a characteristic diagram.

In addition, in FIG. 6, for comparison with the conventional characteristic diagram explained in FIG. 3, a case where the area ratio a is set to a=1 is shown as a representative. In FIG. 6, characteristic curves (,) indicate the characteristics of the conventional circuit shown in FIG. 1 or 2. Characteristic curve (b
) to (, ) are respectively K in the circuit of this embodiment.
The characteristics when m=0.5 and 0.60.7.1 are shown. As can be seen from FIG. 6, in the circuit of this embodiment, the characteristic curve can be selected by changing the value of Km, in other words, by changing the ratio of the emitter areas of transistors Qzs and Q24.

Here, regarding the characteristic line (d), the conventional characteristic curve (, )
and Yamaji.

Let's compare. Since the characteristic curve (d) is for Km=Q, 7, the ratio of the emitter areas of transistors Q23 and Q24 is 3 near. In this case, the current amplification degree (4) when β=20 is 1.032, and the current amplification degree (4) when β=2 is 0.957. Further, this characteristic curve has a peak near β=6, and the current amplification degree (4) when β=6 is 1.059. Now, considering the current amplification degree (4) when β=20 as the standard, when β=2, the current amplification degree (4) decreases by 7.3ch, and when β=6, it decreases by 2.6%. To increase. Therefore, when the current amplification factor (β) is assumed to vary within a range of 20 to 2, the current amplification factor (4) itself varies only within a range of about 10%. The variation width of this current amplification factor is about 115 times the variation width in the conventional circuit. Also, Km=0.6 or 0.
By setting Km = 5, it is possible to reduce the fluctuation range of the current amplification degree (4) as in the case of setting Km = 0.7, and also to make the absolute value of the current amplification degree (4) ideal. can be brought closer to a value of 1.

Next, the case of a% 1 will be explained. In this case too,
In order to explain the comparison with the conventional example, first, in the conventional circuit shown in FIG.
) 1) Let's find the current amplification degree (4) when set to 1). In this case, the current 11+I2 flowing through the input terminal 11 and the output terminal 12 is calculated by the following formula (%). However, IE:) The emitter current of transistor Q1a is
．． 24, the current amplification factor is expressed by the following equation 25.

Then, this formula (c) and the previous 2〇υ (however, a=451
) can be compared. FIG. 7 is a characteristic diagram showing the relationship between the current amplification factor (β) and the current amplification degree (4) expressed by the equation Q when a% is 1. In addition, a% 1
Therefore, the current amplification degree (4) of the circuit is ideally a. However, when a takes various values, the degree of variation in current amplification factor (4) with respect to variation in current amplification factor (β) will be compared.

In FIG. 7, (f) and (g) show characteristic curves in the conventional circuit. Among these, the characteristic curve (f) is a
= 5, and the characteristic curve (g) is a =
The case where 2 is set is shown. Further, (h) and (i) show characteristic curves in this example. Among these, the characteristic curve (h) shows the case where a = 5, and the characteristic curve (i
) indicates the case where a = 2. In addition, the characteristic curve (
In characteristic curve (1), parameter Km is set to 0.9, for example, and in characteristic curve (1), parameter Km is set to 0.8. As shown in Figure 7, the current amplification degree (
Even if 4) is selected to be a value other than 1, according to this embodiment, even if the current amplification factor (β) fluctuates in a small region compared to the conventional circuit, the width of the fluctuation of the current amplification factor (4) can be made significantly smaller. Moreover, the current amplification degree (4
) can be brought as close to the ideal value a as possible. For example, this embodiment will be compared with a conventional circuit using the case where a=2 as a representative example. For conventional circuits, the current amplification factor (β)
As shown in the characteristic curve (ω), when β varies in the range of 2 to 20, the current amplification degree (4) decreases by up to 54% based on β = 20.On the other hand, in this example, As shown in the characteristic curve (1), the current amplification degree (4) decreases by only 19 inches at the most.This value is about 1/3 of that of the conventional method.

Furthermore, in this embodiment, the slope of the characteristic curve is gentle. Furthermore, in this embodiment, the actual current amplification degree (4
) is close to the ideal value (a).

This embodiment described in detail above has the following effects.

■ By appropriately setting the ratio of the emitter areas of transistors Q23 and Q24, it is possible to set the current amplification factor (4) to a value close to the ideal value even if the current amplification factor (β) 5 is in a small region. can.

(2) Similarly, by appropriately setting the ratio of the emitter areas of transistors Q23 and Q24, it is possible to reduce fluctuations in current amplification (4) even when current amplification (β) fluctuates in a small region.

■ Also, when converting the circuit into an IC, transistor Q23
The emitter area of Q24 can be easily set to a desired value even if the temperature changes or the characteristics of transistors Q23 + Q24 change. Thereby, the ratio of the emitter areas of transistors Q23 + Q24 can be easily and accurately set to a desired ratio. Therefore, the circuit shown in FIG. 5 is suitable for IC implementation.

■ Also, transistors Q21 and Q22 or Q23
Even though transistors Q24 and Q24 have the same configuration, the voltages applied between the collector and emitter are different. Therefore, the current amplification factor (β) may differ due to the Early effect. For example, a case may occur in which one transistor always has a larger current amplification factor (β) than the other transistor. However, the direction of variation in the current amplification factor (β) is the same. Even in such a case, by appropriately setting the ratio of the emitter areas of the transistors Q231Q24 according to each condition, the effect (2) described above can be obtained.

(2) Also, since it has the effect (2) mentioned above, it is extremely effective when using a lateral PNP transistor as the transistor. And this lateral PNP
) Since it is possible to improve the performance of current mirror circuits using transistors, it is possible to
PN) It becomes easy to combine with various circuits using transistors, and the range of application in circuit design becomes wider.

FIG. 8 is a circuit diagram showing a second embodiment of the invention.

In the previous embodiment, the current amplification factor (β) can be adjusted by appropriately setting the ratio of the emitter areas of the transistors Q23 and (h4).
We have described a case in which the configuration is configured to reduce the effects of fluctuations in .

In this case, appropriately setting the emitter area ratio is equivalent to appropriately setting the emitter resistance ratio of transistors Q23 and Q24. This can be achieved by appropriately setting the impedance ratio between the current path from terminal 24 to terminal 25 and the current path from terminal 24 to terminal 26, and appropriately distributing the current flowing through terminal 22-24 to terminals 25 and 26. This is nothing more than a separation of resources.

Therefore, in the embodiment shown in FIG.
+Q24θ) Resistors R21+R22 having a 1-bar resistance value sufficiently larger than the emitter resistance of the transistors Q23+Q24 are inserted into the emitters of the transistors Q23+Q24. According to such a configuration, the resistors R21 and R2□
By appropriately setting the ratio of the resistance values of terminals 25 and 2,
6 and 5) (The amount of current distributed to terminals 25 and 26 can be set appropriately. In other words, in the circuit of FIG. 8, the amount of current distributed to terminals 25 and 26 does not depend on the emitter resistances of transistors Q23 and Q24. , depends on the resistors R21 and R22. Note that the resistor R2g + R24 is also inserted to determine the amount of emitter current of the transistors Q21 and Q2°, like the resistors R21 + R22. In this case, Resistance R21r R22 resistance value::
,, If the resistance value of the emitter resistance of transistors Q21 and Q22 is sufficiently larger, the current amplification ratio does not depend on the ratio of the emitter areas of transistors Q21 and Q22, but is determined by the ratio of resistors R23 and R24. Ru.

In this embodiment as well, ① and ② of the previous embodiment are applied.

The effects of ■ and ■ can be obtained. '! ]! , circuit i
When converting into IC, it is easy to set the resistance ratio of resistors R21*R22 to a desired value. Therefore, in this embodiment as well, the above effect (2) can be obtained.

Note that by reducing the resistance value of resistor R211R211, the amount of current distributed to terminals 25 and 26 is increased by transistor Q2.
It may be determined by the ratio of the combined resistance of the emitter resistance of B and the resistance R21 and the combined resistance of the emitter resistance of the transistor Q24 and the resistance R24.

FIG. 9 is a circuit diagram showing still another embodiment of the present invention. In this embodiment, the fc composite transistor described above in FIG. 5 is constructed of a transistor Qzs having a double collector.

□1゜ In this more structured configuration, each collector Ci.

By appropriately setting the area ratio of C2, the impedance ratio between the current path from terminals 24 to 25 and the current path from terminals 24 to 26 can be appropriately set.

Therefore, in this embodiment as well, the same effects as in the previous embodiment can be obtained. In this embodiment as well, by separately connecting a resistor to the collector CI+C1, the above impedance ratio can be appropriately set by the ratio of these resistors or the ratio of the combined resistance of each resistor and the corresponding collector resistor. I can do it.

Note that the present invention is not limited to the above embodiments. This invention is basically constructed as shown in FIG.

In FIG. 10, 31 is a shunt circuit. This shunt circuit 31 has a first current path from the common connection point side of the bases of the transistors Qst + Qxm to the collector side of the transistor Qzx, and a second current path from the common connection point side of the bases to the collector side of the transistor Q22. Has a route. The impedance ratio of the first and second current paths can be changed. By changing this impedance ratio, the first. The amount of current in the second current path is controlled. In this case, 1. By appropriately adjusting the amount of current in the second current path, even if the current amplification factor (β) of the transistors constituting the current mirror circuit fluctuates in a small region, the width of the fluctuation in the current amplification factor (4) of the circuit can be changed. can be made smaller.

Now, it is assumed that transistors Q21 + Q22 have the same characteristics. As a result, both emitter currents and pace currents become equal. It is assumed that the terminals 24 to 26 are directly connected to the corresponding pace or collector. Assuming this, the first. By setting the impedance ratio of the second current path to 1:1, the current amplification factor (4) can be maintained at the ideal value of 1 even if the current amplification factor (β) fluctuates in a small region. .

Taking the above points into consideration, the first embodiment is analyzed as follows. In FIG. 5, from terminal 24 to terminal 25
The path from the terminal 24 to the terminal 25 is the first current path 26-, and the path from the terminal 24 to the terminal 25 is the second current path. 1st. The current flowing through the second current path is expressed by the above equations α and α1, respectively. 1 formula αη, 0:
Simplifying I, the following formula (c) is obtained.

Be like (goods).

Tcd=(]-Kmα)(1-α)(1-1-a)Ix
++・-+・-・wIcb=Kma1'(1-α)
(1+a) IE---4・匈Now, (1+a) If the term Ig is constant, the currents ICd and Icb are expressed by functions having a variable Km. Therefore, the current ICd +
The value of Icb changes as the value of Km changes.

This Km is 1+m, and the transistor Q23 r Q
This value is determined by the ratio of the emitter areas of 24 to 24. The ratio of the emitter areas of transistors Q23 + Q24 is nothing but the ratio of the impedances of the first and second current paths, as described above. Therefore, the currents Icd and Icb are the first. One thing can be said if it is controlled by the impedance ratio of the second current path. Then, if the ratio of this impedance, that is, the ratio of the emitter area is selected appropriately, the current amplification degree (4) can be calculated according to the previous 200 Even if (β) is small, it will not be affected by its fluctuation.

Note that when the characteristics of the transistors Q21 t and Q22 are the same, the first. The impedance ratio of the second current path is set to 1
As described above, if the current amplification degree (4) is set to 1, the current amplification degree (4) can always be set to the ideal value 1. However, in the configuration of FIG. 4, the first current path is a transistor. 23 emitters to their collectors,
The impedance of the first and second current paths is In order to make the ratio 1:1, the ratio of the emitter areas of transistors Q23 r Q24 is necessarily 1;
It will not be 1.

By the way, the circuit consisting of transistors Q23 and Q24 (
The circuit shown in FIG. 5) has the same configuration as the conventional current mirror circuit explained in FIG.

Therefore, when this circuit is viewed as a current mirror circuit, its current amplification factor (Ao) deviates greatly from the ideal value when the current amplification factor (β) is in a small region, and the current amplification factor (β) is in this small region. If it fluctuates, it will be affected by it.

This means that the amount of current flowing through the first current path and the second current path does not depend only on the ratio of the emitter areas of transistors Q23 * Q24, but rather on the ratio of the emitter areas of transistors Q23 * Q24.
1g r This means that it also depends on the current amplification factor (β) of Q24. This is clear from the fact that in the above equation 01), the current amplification degree (4) includes a variable α in addition to Km.

By the way, in the overall circuit shown in Figure 4, the current amplification degree (4
) is not affected by the current amplification factor (β), the current amplification factor (Ao) of the shunt circuit (c) must also be
Of course, it is necessary to avoid the influence of β). However, in the circuit shown in FIG. 5, the current amplification depends on Km and α as mentioned above, so even if only Km is set to a desired value, the current amplification (4) will inevitably be It is affected by the amplification factor (β). This will be explained using the characteristic diagram shown in FIG. As shown in characteristic curves (b) to (d), in the circuit of FIG. 5, Km is o, 5°0.6.
Desired characteristics can be obtained by setting it to 0.7 or the like.

However, this also has a current amplification factor (β) of up to about 8,
It can be seen that when the value is smaller than this, the current amplification degree (4) deviates significantly from the ideal value and the degree of variation becomes large.

To solve this problem, transistor Q231
For the current mirror circuit consisting of Q24, the fourth
The configuration shown in the figure may be applied.

That is, as shown in FIG.
# Just add a circuit consisting of Q27.

According to such a configuration, the transistor Q26゜Qzy
Since the current flowing through the common connection point of the bases of the two transistors is small, the current that does not flow through the transistor Q22 can be reduced, but the current that flows through the transistor Q21 can be reduced. therefore,
The current amplification factor (4) is less affected by the current amplification factor (β). In this case 1 transistor Q26 r Q2
If the -30~ variation in the amount of current flowing through 7 still affects the current amplification degree (4),
Further similar configurations may be added.

Although the details are omitted, the second embodiment and the third embodiment are also the same as the first embodiment. It has a second current path, and by appropriately adjusting the impedance ratio of both chamber flow paths, the current amplification factor (4) is not affected by changes in the current amplification factor (β). Generally speaking, it is expressed as shown in FIG.

In addition, in FIG. 10, the transistor Q21゜Qaa
It goes without saying that a transistor (NPN) may also be used.

By the way, the terminals 24 to 26 of the shunt circuit 31 do not need to be directly connected to the common connection point of the bases of the transistors Qzt r Qaa and the collector of the transistor (1+l+ Qaa. That is, for example, as shown in FIGS. 12 to 14 As such, each terminal 24 to 26 and transistor Q21 +
Qaa pace common connection point, transistor Q21 +
A buffer transistor Q! is connected between the collector of Qaa and the collector of Qaa. ! "Q34 may be provided. In this case,
The 121st section determines which terminals 24 to 26 are to be provided with buffer transformers and what connection configuration they should be made.
In addition to the configurations shown in Figures 1 to 14, various modifications can be made.

〔Effect of the invention〕

As described above, according to the present invention, even if the current linear increase factor of the transistor fluctuates in a small region, it is possible to reduce the fluctuation in the current amplification degree, and also to bring it close to the ideal value. A current mirror circuit can be provided.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an example of a conventional current mirror circuit, Fig. 2 is a circuit diagram showing another example, and Fig. 3 is a circuit diagram showing an example of a conventional current mirror circuit.
Current amplification factor (β) and current amplification degree (
4) is a circuit diagram showing a first embodiment of the current mirror circuit according to the present invention, FIG. 5 is a circuit diagram showing a part of FIG. Figure 6 is the fourth
The current amplification factor (
This is a characteristic diagram that compares the relationship between β) and current amplification (4), especially when current amplification (4) is 1. Figure 7 is similar to Figure 6, and especially current amplification. degree (4) is 2
, 5, FIG. 8 is a circuit diagram showing a second embodiment of this invention, FIG. 9 is a circuit diagram showing a third embodiment of this invention, and FIG. 10 is a circuit diagram showing a third embodiment of this invention. A circuit diagram showing the basic configuration, FIG. 11 is a circuit diagram showing a fourth embodiment of the invention, FIG. 12 is a circuit diagram showing a fifth embodiment of the invention, and FIG. 13 is a circuit diagram showing a fourth embodiment of the invention. A circuit diagram showing an embodiment of No. 6,
FIG. 14 is a circuit diagram showing a seventh embodiment of the invention. Q21 ~ Q24 * Q211 N Q
27 1 Qsl ~ Qaa...
Rangista, Rjl! "R14...Resistance, 21...
Power supply terminal, 22...input terminal, 23...output terminal,
24 to 26... terminal, 31... shunt circuit. , Applicant's agent Takehiko Suzue = 33 = Figure 1 Figure 2 1 2 4 5 a 101'2 141515
20 1) Chest 4 Figure A Figure 5 Figure 6 ↑ 2 4 6 8 1042 14 161820
13 Fig. 7 58- Fig. 8 Fig. 9'zb zb JP-A-58-2026O9 (11)

Claims (1)

[Claims] The first . a second transistor; a first current path from the common connection point side of the paces of the second transistor to the collector side of the first transistor; and a second current path from the common connection point side of the paces to the collector side of the second transistor. having a path, the first and second
It is possible to change the impedance ratio of the current path of the first current path, and by changing the impedance ratio. a current mirror circuit comprising a shunt circuit capable of adjusting the amount of current in a second current path;