JPS5834652A - Communication controller - Google Patents
Communication controllerInfo
- Publication number
- JPS5834652A JPS5834652A JP56132258A JP13225881A JPS5834652A JP S5834652 A JPS5834652 A JP S5834652A JP 56132258 A JP56132258 A JP 56132258A JP 13225881 A JP13225881 A JP 13225881A JP S5834652 A JPS5834652 A JP S5834652A
- Authority
- JP
- Japan
- Prior art keywords
- line
- transmission speed
- memory
- transmission
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004891 communication Methods 0.000 title claims abstract description 13
- 230000005540 biological transmission Effects 0.000 claims abstract description 39
- 230000015654 memory Effects 0.000 claims abstract description 20
- 238000012360 testing method Methods 0.000 claims abstract description 12
- 230000004151 fermentation Effects 0.000 claims 1
- 238000000855 fermentation Methods 0.000 claims 1
- 230000006870 function Effects 0.000 abstract description 4
- 238000012545 processing Methods 0.000 abstract description 3
- 238000012544 monitoring process Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 208000032369 Primary transmission Diseases 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0262—Arrangements for detecting the data rate of an incoming signal
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Computer And Data Communications (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は通信H+lJm装置、書に回−の伝送速度を考
慮した回−刺飾を行なう通信制御装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a communication H+lJm device, and a communication control device that performs circular decoration in consideration of the transmission speed of circular lines.
従来データ通信における伝送速度を決定するフォールバ
ック機hヒは富に最大の伝送速度から伝送を開始し、伝
送嗣り兇生時点で一次伝送述度を低下してゆく方法を取
っていた。したがって、1らかに通信回線状態が悪いと
きや、受信側の伝送速度が固定の場合は、情報伝送効率
の低下を招く欠点があった=
また1通信制御装置においては2回線制御部1個あたり
の回線接続数は固定でめったため1回線の最大伝送速駁
を考慮して回線接続部に目線を接続する必要があり、1
つの回線制御部に障簀が生じた場合そこに接続さ扛てい
るすべての回線が通信不能になるという欠点があった。Conventionally, fallback machines for determining the transmission speed in data communication have adopted a method of starting transmission at the maximum transmission speed and decreasing the primary transmission predicate at the end of the transmission. Therefore, when the communication line condition is particularly bad or when the transmission speed on the receiving side is fixed, there is a drawback that information transmission efficiency decreases = Also, in one communication control device, two line control units are used. Since the number of line connections per line is rarely fixed, it is necessary to connect the line to the line connection part in consideration of the maximum transmission speed of one line.
There was a drawback that if a failure occurred in one line control unit, all lines connected there would be unable to communicate.
本発明ち変復調装置内に回線試験装置とそ扛によって求
めらnた1gl線の伝送速度を記憶するメモリヲ付加す
ることで、情報伝送を開始する際フォールバック機能な
しにその回線の伝送速度を即座に決定でき前者の欠点を
解決し、さらに、前記メモリの記憶内容を監視しそjL
らの伝送速度状態に対応して回線接続制御部で回1制御
部に回線をit+分けることで後者の欠点を解決し、効
率よく回線制御部を活用できるようにした装置itを提
供するものである。In the present invention, by adding a line testing device and a memory to store the transmission speed of the n1GL line determined by the device in the modem, it is possible to immediately change the transmission speed of the line without a fallback function when starting information transmission. It is possible to solve the former drawback and further monitor the contents of the memory.
The present invention provides a device IT that solves the latter drawback by dividing the line into two line control units at the line connection control unit in accordance with the transmission speed status of each line, and makes it possible to efficiently utilize the line control unit. be.
本発明によると回線試験を行う回線試験装置と。According to the present invention, there is provided a line testing device for carrying out a line test.
その時点での回線の伝送速[J:記憶する機能をもつメ
モリとを内戚した変復調装置と、前記メモリ(ハ)谷を
藍視し伝送速度に対応した回線の数を回線制御部に接続
させる制御を行う回線接続制御部を含むことを%像とす
る通信制御装置が得らnる。The transmission speed of the line at that time [J: A modem with a memory that has a memory function, and the memory (C) The number of lines corresponding to the transmission speed is connected to the line control unit by looking at the valley. A communication control device is obtained which is designed to include a line connection control unit that performs control.
次に本発明の実施?1]について図四を参照して説明す
る。第1図は本発明の一実施例のブロック図で% 10
1〜108は通信回路、109.116U回mgk装置
117〜l 24u変*Va回路、125〜132
は伝送速度記憶メモ!7.133〜140は変復調装置
、141は回線接続制御部。Next, implementation of the present invention? 1] will be explained with reference to FIG. Figure 1 is a block diagram of an embodiment of the present invention.
1 to 108 are communication circuits, 109.116U times mgk device 117 to l 24u variable*Va circuits, 125 to 132
is the transmission speed memory memo! 7. 133 to 140 are modem devices, and 141 is a line connection control unit.
142〜149社回線接続部、150〜152は回−制
御部、153はチャネル、インタフェース部、154は
通信制御装置である。142 to 149 are company line connection units, 150 to 152 are line control units, 153 is a channel and interface unit, and 154 is a communication control device.
本発明において変復調装置1133〜140は健米の変
偵調慎能を有する変復調回路117〜124に加えて回
線1111:線装置109〜116.伝送速度記儂メモ
リ125〜132を有し前記同一試験装置1t109〜
116は 常時 回−に対し伝送速度の試験を行ない、
その結果の伝送速度は 伝送速度記憶メモリ125〜1
32に記憶さ扛ている。In the present invention, the modem devices 1133 to 140 include the modem circuits 117 to 124, which have a comprehensive modulation function, and the lines 1111: line devices 109 to 116. The same test equipment 1t109~ has transmission speed memory 125~132.
116 constantly tests the transmission speed for
The resulting transmission speed is transmission speed storage memory 125-1
I remember it at 32.
また回線接続制御部141は伝送速度記憶メモ!712
5〜132の内容を監祝し1回線制御部150−152
に対してその回線の情報伝送開始の伝送速度を知らせる
機能と麺々の伝送速度をもつ回線を回線制御部150〜
1520回線処理能力′に合わせ回線制御部150〜1
52に接続させる機能を有している。The line connection control unit 141 also has a transmission speed memory memo! 712
1 line control unit 150-152 supervises the contents of 5 to 132.
The line controllers 150 to 150 control the line having the function of notifying the line of the transmission speed at which information transmission will start, and the line having the appropriate transmission speed.
Line control unit 150-1 according to 1520 line processing capacity'
52.
今、具体例として例えば、1gIIvi!試験i[10
9〜116により各回17!101〜108の伝送速度
1−、回[101ν10.3は9600bl)at圓縁
線102*105豐106嘗107a480Qbpa會
10gが2400bpsと検出された場合、こnらの伝
送速度は伝送速度記憶メモ9125〜132に記憶さi
Lる。回線接続制御装置141は伝送速度記憶メモリ1
25〜132の記憶内容を監視し1回婦制御部150〜
152に回Iwil接続を行う。−[えは。Now, as a specific example, for example, 1gIIvi! Test i[10
9 to 116 each time 17! Transmission rate of 101 to 108 is 1-, times [101ν10.3 is 9600bl) at round line 102*105豐106嘗107a480Qbpa If the transmission rate of 10g is detected as 2400 bps, these transmissions The speed is stored in the transmission speed memory memo 9125 to 132.
L. The line connection control device 141 is the transmission speed storage memory 1
The memory contents of 25 to 132 are monitored and the controller 150 to 132 are monitored once.
At 152, an Iwill connection is made. -[Eha.
回線接続部150〜15201個の回線処理能力が96
UObps回線tー2回線収容できる能力を持っていた
と仮定すると1回111i1接続制御装置141は回婦
制m5x5oに9600bpsO1mm 1 0 1と
103を接続し1回−制御部151に4800bpsの
回線102+ 105* 106− 107を接続し,
そして回@ iUl」<111部152には240.0
bpsO回!1i1104,108を接続するという制
御を行う。Line processing capacity of 150 to 15201 line connections is 96
Assuming that it has the capacity to accommodate UObps line t-2 lines, once 111i1 connection control device 141 connects 9600bps O1mm 101 and 103 to converter m5x5o, and once-control unit 151 connects 4800bps line 102+105* Connect 106-107,
And times @ iUl''< 111 part 152 is 240.0
bpsO times! 1i1104 and 108 are connected.
塾らに,もし1つの回線制御部か障害になった場合,残
りの同一′ItIIJ01部に回線を接続させるという
冗長4s成の1tIJ御も行うことができる。It is also possible to perform 1tIJ control with a redundant 4S configuration, in which if one line control section fails, the line is connected to the remaining same 1tIIJ01 section.
本発明は以上説明したように変復調装置内に、回,fi
!試験装置と伝送速度記憶メモリを内賦し,ざらにその
メモ!J1kk視し,(9)線制御部に回−を接続する
回縁接続制御装置を構成することにより。As explained above, the present invention has a modulator and a demodulator with
! Incorporate the test equipment and transmission speed memory, and take notes! (9) By configuring a line connection control device that connects the line to the line control unit.
回縁の伝送速1ftl−即座に決定できかつ効率的に回
−制御部t−利川用き回Im制御部の冗−bc栴成もと
3る幼釆がある。There is a young method that can instantly determine the transmission rate of 1 ftl and efficiently establish the redundancy of the circuit control unit T and the circuit Im control unit.
鯖1図は本発明の一実施例のブロック図でりる。
101−108・・・・・・通信回線,109〜116
・・・・・・回−試−装置,117〜124・・・・・
・変仮調回wh 125〜132・・・・・・伝送速度
記憶メモリ。
133〜140・−・・−変復調装置,141・・・・
・・回線接続制御部.142〜149・・・・・・回線
接続部。
150〜152・・・・・・回線制御部,153・・・
・・・チャネル、インタフェース部、154・・・・・
・通信制御装置。Figure 1 is a block diagram of one embodiment of the present invention. 101-108... Communication line, 109-116
・・・・・・Time-trial-device, 117-124...
・Modification frequency wh 125-132...Transmission speed storage memory. 133-140...-Modulator/demodulator, 141...
...Line connection control section. 142-149...Line connection section. 150-152... Line control section, 153...
...Channel, interface section, 154...
・Communication control device.
Claims (1)
のT送運度t5己1慈する十或り己をもつメモリと全内
戚しfC父復調表−と、前記メモリ内容を監視し。 伝送速度に対応した回線の数を回線制御部に接続させる
1tllI−を行う回−接続制御部を富むことを特慎と
する通信−」御装置。[Scope of Claims] The fermentation test device and the mouth at the time of seven) are all internally related to the memory that has Tano's T transport rate t5 and 1 and 1 and 1 and 1 and 1. monitor the fC father demodulation table and the memory contents; A communication control device that takes particular care to include a line connection control unit that connects the number of lines corresponding to the transmission speed to the line control unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56132258A JPS5834652A (en) | 1981-08-24 | 1981-08-24 | Communication controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56132258A JPS5834652A (en) | 1981-08-24 | 1981-08-24 | Communication controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5834652A true JPS5834652A (en) | 1983-03-01 |
Family
ID=15077064
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56132258A Pending JPS5834652A (en) | 1981-08-24 | 1981-08-24 | Communication controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5834652A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5421108A (en) * | 1977-07-18 | 1979-02-17 | Matsushita Electric Ind Co Ltd | Judging method of most suited delivery speed of modem |
| JPS5435614A (en) * | 1977-08-24 | 1979-03-15 | Nec Corp | Transfer speed selecting system in facsimile |
| JPS5624848A (en) * | 1979-08-08 | 1981-03-10 | Nec Corp | Communication control device |
-
1981
- 1981-08-24 JP JP56132258A patent/JPS5834652A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5421108A (en) * | 1977-07-18 | 1979-02-17 | Matsushita Electric Ind Co Ltd | Judging method of most suited delivery speed of modem |
| JPS5435614A (en) * | 1977-08-24 | 1979-03-15 | Nec Corp | Transfer speed selecting system in facsimile |
| JPS5624848A (en) * | 1979-08-08 | 1981-03-10 | Nec Corp | Communication control device |
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