JPS584180A - Active matrix substrate - Google Patents

Active matrix substrate

Info

Publication number
JPS584180A
JPS584180A JP56102984A JP10298481A JPS584180A JP S584180 A JPS584180 A JP S584180A JP 56102984 A JP56102984 A JP 56102984A JP 10298481 A JP10298481 A JP 10298481A JP S584180 A JPS584180 A JP S584180A
Authority
JP
Japan
Prior art keywords
substrate
peripheral drive
active matrix
polycrystalline silicon
matrix substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56102984A
Other languages
Japanese (ja)
Other versions
JPH0261032B2 (en
Inventor
山田 彪夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Priority to JP56102984A priority Critical patent/JPS584180A/en
Publication of JPS584180A publication Critical patent/JPS584180A/en
Publication of JPH0261032B2 publication Critical patent/JPH0261032B2/ja
Granted legal-status Critical Current

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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本−明ソーダガラス、ホウケイ酸ガラス、ある論は石英
等の透明基板上に少なくとも多結晶シリクyある^はア
モルファスシリコンを主構底部材としてなるアタテイプ
マト讐I翼1i@Kmf為ものであ為。
Detailed Description of the Invention This invention - Alumina glass, borosilicate glass, and some theories include at least polycrystalline silicon on a transparent substrate such as quartz. Kmf Tamemono De Ame.

近年平板wig晶ディスプレーは腕時計、電卓・玩具を
始めとして自動車、計測器、情報機器熾末へと応用分野
が拡太さnつつあol特に最近においては半導体集積胞
路技術によりてa(基板上へスイッチング用シランジス
I−路をマトリクス状に浴底しこの−(基板と透明ガラ
ス板間に液晶を封入しにテレビiii*表示用の液晶デ
ィスプレーパネルが開発されてい為。
In recent years, the field of application of flat WIG crystal displays has been expanding from wristwatches, calculators, and toys to automobiles, measuring instruments, and information equipment. A liquid crystal display panel for TV III* display has been developed in which a liquid crystal is sealed between a substrate and a transparent glass plate.

アタティプマトリクス1式で液晶パネルを構成した例で
は前記単結晶g(基板を用IAたものやガラス基板上に
薄1ll)ランジスJl形属したもの及びバリスタ基[
を用いたものなどが既に程合されて^るが中ても大息パ
ネル化ならびKWスジ画から前記ガラス基板上に薄部ト
ランジスIを浴底してな為アタテイプマトリタス基板は
将来有望准方式と考えられてWs Jl 。
In an example in which a liquid crystal panel is constructed using one set of attatip matrices, the above-mentioned single-crystal G (using a substrate of IA or thin 1 ll on a glass substrate) and a varistor group [
Although the use of atta-type matrices has already been developed, the use of atta-type matrix substrates is promising in the future, since they are made into large panels and the thin transistor I is placed on the glass substrate from the KW stripe painting. Ws Jl is considered a quasi-method.

従来ガラス基板上に多結晶シwコy等を堆積して浴底さ
れ為薄膜トランジスタは基板に贈すhlI&111約か
ら低温プ■セスを用すざるを得な−ことは周知の過−て
あゐ、しかし前記薄膜トランジスタを用いてのアクティ
ブマ謝りクス基板の場合アタテイプマトリタスー路はと
もかくとして周辺駆動回IIは高周波動作を要求される
ため少なくともA励fは単結晶シリコンに近いものでな
くてはならない、その究め周辺駆動−路は単結晶シリコ
ン基板上に形層しアクティブマトリクス基板にいわゆる
外すけすることが一般的である。
It is well known that conventionally, thin film transistors are produced by depositing polycrystalline materials on glass substrates, which requires the use of low-temperature processes due to the HLI and 111 conditions applied to the substrate. However, in the case of an active matrix substrate using thin film transistors, the peripheral drive circuit II is required to operate at a high frequency, leaving aside the attenuation matrix circuit, so at least the A excitation f is not close to that of single crystal silicon. Generally, the peripheral drive path is formed on a single crystal silicon substrate and then removed to an active matrix substrate.

しかし従来の1組方式では周辺駆動回路基板の製造費は
勿論のことアタテイプマ知りクス基板への外ずけ費用を
富め為と轟然の事ながら大巾なコストアップに結がゐこ
とは云うまでもない。
However, it goes without saying that the conventional one-set method not only increases the manufacturing cost of the peripheral drive circuit board but also increases the cost of disassembling the attribution mask board, which leads to a tremendous increase in costs. Nor.

又基板材として石英基板の工うに耐熱性を有する材料を
用^てアクティブマトリクス基板を形底した場合は10
0OC以上の高温7wセスも可能と1kh究め周辺駆動
回路を内蔵したアクティブマトリクス基板の製造は可能
となる。
In addition, when the active matrix substrate is made of a heat-resistant material similar to that of a quartz substrate, the base material is 10.
It is possible to manufacture active matrix substrates with built-in peripheral drive circuits by achieving 1kHz high-temperature 7W processing at temperatures above 0OC.

しかしこ\で一つ間−となるのは元リークについてであ
る。
However, the one thing I would like to pause on here is the original leak.

本来平板液晶ディスプレーは携帯用かつ野外用としての
利用価値が大きく轟然の事ながら太陽光の下での使用s
fが多くなる。
Originally, flat-panel LCD displays have great utility as portable and outdoor devices, but they can also be used under sunlight.
f increases.

アタテイプマ)リタスxC基IIiは直接太陽光が表示
画を隔射す為ためXC7gg内にも党が入射する。
Since direct sunlight is reflected on the display screen of the Ritas xC Group IIIi, sunlight also enters the XC7gg.

XC基板内への入射光は電子と正孔を発生させ基板内に
拡散しP−N接合ISK到達す為とy−1111合部に
電流が流れてしまう、すなわちとの光起電力効果はトラ
ンジスタのソー翼ドレインの!−夏接接合部リータ現象
を引自起ζし正し%AWifl1m示が得られなく10
画像がちらつ論究1消えたすする。このため繭記覚り−
タ現象を押さえるための一手段としては基板の晶IIK
を小さくしり−タ電流の低減を計為ことであ*、 *述
の如くアタテイプマトリタス寵路にお−ではそれかあ!
Ii[可能であるからである・ しかしながら劇紀扉温プロセスは石英基板上の多結晶シ
リ:1y全体を結晶化させ為ことKtj轟然移導匿が高
(′&り覚す−タが増加し好ましい構造   ゛とはい
えなi。
The incident light into the XC substrate generates electrons and holes, which diffuse into the substrate and reach the P-N junction ISK, and a current flows through the Y-1111 junction.In other words, the photovoltaic effect of the transistor 's Thor Wings Drain! - Due to the spontaneous rise of the Rita phenomenon at the summer junction, the correct %AWifl1m indication could not be obtained.10
Image flickers study 1 disappears. For this reason, cocoon memory-
One way to suppress the phenomenon is to
By making it smaller and reducing the motor current, *as mentioned above, it is in the favor of the attaipumatritus.That's it!
Ii[This is because it is possible. However, since the Gekiki door temperature process crystallizes the entire polycrystalline silicon on the quartz substrate, the Ktj tremendous transfer is high (' Preferred structure ゛However, i.

又、近来ij周知の如くレーザー光あゐvhは11(エ
レクトロンビーム)を用りて無足形ある論は多結晶のシ
リコン面に照射することに工す結晶化をはかう*0%あ
るいはイオン照射時のダメージを消去すゐ技術が開発さ
れてきてbる。
In addition, as is well known in recent years, laser light (A/VH) uses 11 (electron beam) to achieve crystallization by irradiating the polycrystalline silicon surface *0% or ion irradiation. Technology has been developed to erase the damage caused by time.

中でもレーザー加熱に1rcv了ルゴ−lレーず−。Among them, 1rcv for laser heating.

CVクリ1トンレーザー、パルスYAGレーザ−、CW
励起YAGレーザーなど種々の方式があり出力、エネル
ギーあゐいはスポット径をはじめとして生産性安定性に
いたるまで構造上、動作上。
CV Cryton laser, pulsed YAG laser, CW
There are various methods such as pumped YAG lasers, and they vary in terms of structure and operation, including output, energy, and spot diameter, as well as productivity and stability.

の本質的な違^を有しており目的による選択も重畳な1
!累と1に為。
There are essential differences between the two, and the choices depending on the purpose are also overlapping.
! For the first time.

このレーザ党を利用してのレーザーアニール技術を用i
れば1例えばガラス基板上に周辺層lE1[g回路を内
蔵したアタティプiトリクス基WLにレーザー7二−ル
し全体に移導度を高めることは可能となる。シかしレー
ザーアニール効果はスポット径と照射時間KIDスルー
プットが決足されるため基職全体にレーザ了ニール加工
を行なうと例えば1−闘轟9の生産性は基板数枚程寂と
少量でToプ効率のきわめて悪い工程とtiりてしまう
Using laser annealing technology using this laser
In this case, for example, it is possible to increase the overall conductivity by applying a laser 7 burn to the peripheral layer IE1 [g circuit built-in attatip itrix group WL on a glass substrate. However, the laser annealing effect is determined by the spot diameter and irradiation time KID throughput, so if laser annealing is performed on the entire base, the productivity of 1-Togo 9, for example, can be reduced to just a few boards. This results in an extremely inefficient process.

以上述べた如く党す−タに強くしかも低価格アクティブ
マトリクス基板を製造すAK!iりては従来方式におけ
る種々の欠点を改善する必要がある。
As mentioned above, AK manufactures active matrix substrates that are highly durable and low-cost! There is a need to improve various drawbacks of conventional methods.

本発明は従来の欠点を除去せしめ為ものであ争すなわち
ガラス等の透明基板上に多結晶シリコンあるいはア毫ル
7アスシ讐コyを主構蹴部材とするアタティプiトリタ
スlI絡を形成し、しかも−一基板上に諌記アタテイプ
マト讐lx@路tmみ込む形で周辺駆動回路を配置し、
該周辺駆鋤−−儀城のみをレーダーアニール加工等を行
な論トランジスターの1−[を高めるというものでTo
為。
The present invention is intended to eliminate the drawbacks of the conventional art, namely, to form an attachable structure using polycrystalline silicon or aluminum as the main structural member on a transparent substrate such as glass. Furthermore, peripheral drive circuits are arranged on one board in such a way that they are embedded in the external drive circuit.
Radar annealing is performed only on the peripheral drive--Gijo, etc. to increase the 1-[ of the transistor.
For.

すなわち前述の如く周辺駆動asiの内蔵化をはじめと
し、JI動装を高める1!IIとしてレーず一アニール
を基板屑辺部の駆動a路の与K11ll射す為究めスル
ープットを同上し、しか亀内部677テイプマトvタス
ー路の異装置を小さくシ11L究め覚り−タ防止の向上
も計れると−う特徴を備えたものである。
In other words, as mentioned above, including the built-in peripheral drive ASI, 1! As II, the laser annealing is applied to the driving path of the substrate waste side, thereby increasing the throughput, and also reducing the size of the different device of the internal 677 taper path and improving the prevention of wake-up. It has the following characteristics.

次に本発明をT1にし為す実霧例にもとすいて靜aK説
明す為。
Next, in order to explain the silence using an actual fog example in which the present invention is made into T1.

実施例(1) 1111図は本尭明によるアクティブマトリクス基板で
ありホウケイ酸ガラス基板l上にアクティブv ) Q
クスー路2を中心部に周辺駆動回路3を外周Sに配置し
たものである。
Example (1) Figure 1111 is an active matrix substrate by Takaaki Moto, which is an active matrix substrate on a borosilicate glass substrate.
The peripheral drive circuit 3 is arranged around the outer periphery S with the cross path 2 in the center.

111111g1〜+61 ij本発明のアクティブマ
トリクス基板の製造過程をel頃するための基板断面図
てあ轟、先ず511図mlの如(ホウケイ酸ガラス基板
l上に625℃の減圧写囲気中にて5oooZe厘lの
多結晶シリコン114を形放後該多結晶シリコンIE4
をホトエツチングし部分的に開孔せしめる。
111111g1~+61ij A cross-sectional view of the substrate for carrying out the manufacturing process of the active matrix substrate of the present invention. After molding the polycrystalline silicon 114, the polycrystalline silicon IE4
Photoetch and partially open holes.

次に基板上の周辺部すなわちIII図の周辺駆動回路1
の領域内のみIN!IIcI(a)の如(CV励起!ム
Gレーザーを光源としたビーム径200sB、線速f 
50 ts / 8 a aでビームを左右の方向にス
キアンさせ1kから、しかも1〜4の順序にてレーずア
ニール加工を行なった1次#C厘2図141の如くに全
面にCVD−II i Os WiBt2000 Xj
lk槓Lりeち前記allの多結晶シリコy#11と同
−浴底方法で纂2の多結晶シリコンH6を形鷹したのち
、多結晶シリコンl[@のソースビレ41部の開孔ヲホ
トエッチングにて行なう。
Next, the peripheral part on the board, that is, the peripheral drive circuit 1 in Figure III.
IN only within the area of! IIcI (a) (CV excitation! Beam diameter 200 sB using a mu G laser as a light source, linear velocity f
The beam was scanned in the left and right direction at 50 ts/8 aa, and the laser annealing process was performed in the order of steps 1 to 4 from 1k. OsWiBt2000Xj
After forming the second polycrystalline silicon H6 using the same bath bottom method as the polycrystalline silicon y#11 described above, the hole in the source fin 41 of the polycrystalline silicon 1 was photographed. Performed by etching.

次に基板主面上K I X 10”lam■のリンイオ
ンを照射1、sso℃1mのフォー$yダガス中にてア
ニールを行なり拡散層を形成す為1次に箇8図(elの
如(cvn−s(0=l[7を形II L t ll:
I yタタトホールを開孔し引つづき電lI8の形成を
行なiアクティブマトリクス基板の影厘を終了する1本
笑細例にもチvhたアタティプマシV#ス611のr−
ト及びデータ線のライ/Jlは谷に800本であ0本基
板を用−てデーター纏は約I MHz eスゲ−か線も
25 Klgでの動作がiis*され筺晶褒示ディスプ
レーとして充分な性能を有すふことが**されて^b、
又レーザーアニール加工の効果としてアニールのスルー
1ツトは従来に較べて数倍以上の向上をみせてお9さら
に1鋤[はアIテイプマ)Vタス回路中では約10 a
t /マー1− てあ夛周辺駆動−路部では約1100
a/マー1##が得られて^る。
Next, the main surface of the substrate was irradiated with phosphorus ions at K I (cvn-s(0=l[7 form II L t ll:
Attatipmash V# r- of V# 611, which was also used as a small example, to open the I y tatato hole and subsequently form the conductor lI8 to finish the imprinting of the i active matrix substrate.
There are 800 wires and 0 wires in the valley, and the data wire is about I MHz. A fruit with such performance has been created ^b,
Also, as an effect of laser annealing processing, the annealing throughput has been improved by several times compared to the conventional method.
t / Mar 1 - Tear force peripheral drive - Approximately 1100 on road sections
A/mer 1## is obtained.

実施例(り 実施例(11と同機#C謳lの多結晶シリコン属を形成
後ホトエツチングにで部分的な開孔を行なつた後篇lI
Q16mの如く実施例(11と同一条件にて周辺駆動回
路の(1)と(31の領域をレーザーアニール加工した
のち周辺部11I回路の(2)と14)を11)及び1
3)に較べて低出力の約IJ15+1”のエネルギーW
if”e照射した。すなわち周辺駆動(2)路のCりと
(4)の領域はゲート線駆動用であり(11及び(釦の
デ÷ター綴用に較べて低周波動作が可能なため周辺駆動
回路全体を同一エネルギーWI[で照射する必要性は1
k<本実施例の結果でもゲート線を動作させるために充
分な島装置を得為ことが確認されしかも基板外周部の8
辺は低エネルギーvtiwvs射のためスループットは
実施例11)に較べてさらに同上している。
Example (Second Part 1) After forming polycrystalline silicon of the same type as Example 11 and #C, partial holes were formed by photo-etching.
Example (1) of the peripheral drive circuit and (2) and 14 of the peripheral part 11I circuit after laser annealing the area of 31 under the same conditions as Q16m (11) and 1
3) Low output energy W of approximately IJ15+1” compared to
In other words, the areas C and (4) of the peripheral drive path (2) are for driving gate lines, and can operate at a lower frequency compared to the areas (11 and (11) for data spelling of buttons. The need to irradiate the entire peripheral drive circuit with the same energy WI is 1
k
Since the edges are low-energy vtiwvs morphisms, the throughput is even higher than in Example 11).

実施911131 FULfILLSと同様に第1の多結晶シリコン属を形
成後ホトエツチングにて部分的な開孔を行itつた後1
18 WJialの如〈実施例(1)と同一条件にて周
辺駆動回路の(11と+m領域すなわちデーター綴駆動
−路領域のみをレーザーアニールすす。
Implementation 911131 Similar to FULfILLS, after forming the first polycrystalline silicon layer and partially opening holes by photoetching, 1
18 WJial (under the same conditions as Example (1), only the (11 and +m regions, that is, the data binding drive path region) of the peripheral drive circuit were laser annealed.

すなわち実施例11#Cて説明の如(特にゲーF−のラ
イン数の少ないアタティプマト讐Iス基板については本
方式でも充分対応が叡れスルー1ツ)の大巾な向上がの
ぞめる。
That is, as described in Embodiment 11 #C (this method is also fully applicable to the attach matte substrate with a small number of lines in the game F- in particular), a great improvement can be expected.

実施例(4m 実施例(11と同様K11lの多結晶シlsy膜を浴底
後ホ奈エツチングにて部分的1kll孔を行なった後第
3@C−の如く基板の周辺駆動−語領域へのレーザーア
ニール照射を先ず(11の領域にビームを矢印の如(左
右に真中ヤy1せて行1にい、つづいて基板を中心に対
して90°m1転しく自)の領域を(1)と同一方式に
て照射しりづ^て岡じ方式にて基1[會■転させて(m
(4)の領域を課射す為、この:**では実施例11)
K較ペビームのス命ヤy数が大巾に減少出来ゐため実施
例(II K較べてXループツシが向上出来る利点を有
す石。
Example (4m) As in Example (11), a partial 1kll hole was formed in the K11l polycrystalline silicon film by hole etching after the bath bottom. First, apply the laser annealing to the area (11) as indicated by the arrow (center Y1 on the left and right, row 1, then rotate the substrate 90° m1 from the center) to the area (1). The same method was used to irradiate the base 1 using the Okaji method.
In order to impose the area of (4), this: ** Example 11)
This stone has the advantage of being able to improve the X loop strength compared to Example (II) K, since the number of strokes of the beam can be greatly reduced compared to K.

以上実施例(11〜(4) Kて説明し究如く1本俺−
は平1[#[晶ディスプレイ等に周動もれるアタティプ
iトリタス基IiKおiで、ガラス基板上(アタティプ
マト曹タス回路と周辺駆動回路をワyチツ1化す為と同
時にレーザアニール技術を利用し駆動−路のみにレーザ
ーアニール照射を行ないアタティプマトリクスー路に耐
覚り−ク対策をはどこしたものであり、低コストでしか
も光り−タに強いアタテイプマシリtス基板の提供を可
能和したものである。
Above are the examples (11 to (4))
In order to integrate the attatip matte circuit and the peripheral drive circuit into one size on a glass substrate, laser annealing technology was used at the same time. By applying laser annealing to only the drive path, we have taken measures to prevent damage to the attenuation matrix path, making it possible to provide a low-cost attribution matrix substrate that is resistant to optical radiation. be.

なお実施例において透明基板としてホロケン酸ガラスを
用^ているが伽にソーダガラスあるいは石英**の透明
基板でも良(、さらにトランジスターA11llrを基
的91段としてレーザーアニールの他[311等につい
ても効果は確認されてお9.これらの照射条件K”:)
Vhても目的に応じて自由に選択可能でありなんら本発
明の目的から逸脱するものではない。
In the examples, holokenic acid glass is used as the transparent substrate, but a transparent substrate of soda glass or quartz** may also be used. 9.These irradiation conditions K”:)
Vh can also be freely selected depending on the purpose and does not deviate from the purpose of the present invention.

【図面の簡単な説明】[Brief explanation of the drawing]

1111図は本発明に1ゐアクティブマトリクス基IF
Kお打ゐ回路配置図 11311m1〜(6)は本発明和おけるアクティブマ
ド層タス基歇の製造過糧を示す基橡断面図第3−一1〜
−1は本−明にお行為アタテイプマトリIス基板上の周
辺駆動−酪領械へのレーザーアニール照射方法を示す平
面図 1、・・ガラス基板 Q @ 611アクテイブマトリタスlll路3・・・
周辺駆動胞酪 4・・・多結晶シリコン展 5 @ @ @ CV トI(’s ll6II・・多
結晶シリコylI 7  @  a  e  (7D  −8jO1膜8e
・・電極 以   上 出願人 株式会社Ill#精工舎 代1人 弁■出量 上  海 第1図 第2図 (A) 第3図
Figure 1111 shows a 1-active matrix based IF according to the present invention.
K-type circuit layout diagrams 11311m1 to (6) are cross-sectional diagrams of the basic structure showing the manufacturing errors of the active layer base in the present invention.
-1 is a plan view 1 showing a laser annealing irradiation method for the peripheral drive-coupling machine on the active matrix I glass substrate Q @ 611 active matrix Ill path 3...
Peripheral drive cell 4...Polycrystalline silicon film 5 @ @ @ CV ToI ('s ll6II...Polycrystalline silicon ylI 7 @ a e (7D -8jO1 film 8e
...Electrode and above Applicant Ill Co., Ltd. #Seikosha 1 person Valve Volume Output Shanghai Figure 1 Figure 2 (A) Figure 3

Claims (1)

【特許請求の範囲】 データ線とゲート線のマトリ久スからなり、llr記デ
ータ線とダート線を駆動するために各々シフトレジスタ
ー^と含む周辺駆動−路が内蔵さtL。 しかも前記周辺駆動l1llIはマトリクス回路を囲う
基板周辺IIK配置されたアクティブマシリタスICa
i[Kお^て1紀周辺駆動回路と構放す為すべてのトラ
ンジスタ、ある^はその中の1部が、マトリクス−路に
較べて、異動lの高いトランジスターて溝底されている
ことを特徴とするアクティブiトリクス基板。
[Claims] It consists of a matrix of data lines and gate lines, and has built-in peripheral drive paths including shift registers to drive the data lines and dart lines, respectively. Moreover, the peripheral drive l1llI is an active macilitas ICa arranged around the substrate surrounding the matrix circuit IIK.
In order to keep it separate from the first generation peripheral drive circuit, all transistors, some of which are characterized by being groove-bottomed, are transistors with a higher variation than the matrix circuit. Active i-trix board.
JP56102984A 1981-06-30 1981-06-30 Active matrix substrate Granted JPS584180A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56102984A JPS584180A (en) 1981-06-30 1981-06-30 Active matrix substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56102984A JPS584180A (en) 1981-06-30 1981-06-30 Active matrix substrate

Publications (2)

Publication Number Publication Date
JPS584180A true JPS584180A (en) 1983-01-11
JPH0261032B2 JPH0261032B2 (en) 1990-12-18

Family

ID=14341976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56102984A Granted JPS584180A (en) 1981-06-30 1981-06-30 Active matrix substrate

Country Status (1)

Country Link
JP (1) JPS584180A (en)

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609286A (en) * 1983-06-28 1985-01-18 Seiko Epson Corp Video monitor by liquid crystal display
JPS61229103A (en) * 1985-04-04 1986-10-13 Canon Inc Controller of copying machine or the like
JPS6352121A (en) * 1987-08-14 1988-03-05 Seiko Instr & Electronics Ltd Electrooptic device
JPS63223788A (en) * 1987-03-13 1988-09-19 日本電気株式会社 Active matrix display device drive IC
JPS63307431A (en) * 1987-06-10 1988-12-15 Hitachi Ltd Thin film semiconductor display device
JPS642019A (en) * 1987-06-25 1989-01-06 Asahi Glass Co Ltd Active matrix type liquid crystal display element
JPS6445162A (en) * 1987-08-13 1989-02-17 Hitachi Ltd Manufacture of semiconductor device
JPH06151307A (en) * 1993-06-11 1994-05-31 Sanyo Electric Co Ltd Manufacture of thin film transistor circuit device
JPH07135323A (en) * 1993-10-20 1995-05-23 Semiconductor Energy Lab Co Ltd Thin film semiconductor integrated circuit and manufacturing method thereof
JPH07202215A (en) * 1994-12-05 1995-08-04 Hitachi Ltd Thin film semiconductor device and manufacturing method thereof
JPH0950045A (en) * 1995-12-15 1997-02-18 Seiko Instr Inc Semiconductor device, light valve device and projection device
US5962897A (en) * 1992-06-18 1999-10-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6236064B1 (en) 1991-03-15 2001-05-22 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6472297B1 (en) 1998-03-31 2002-10-29 Matsushita Electric Industrial Co., Ltd. Method of producing TFT array substrate for liquid crystal display device
US6486497B2 (en) 1988-05-17 2002-11-26 Seiko Epson Corporation Liquid crystal device, projection type display device and driving circuit
JP2003168691A (en) * 2001-11-30 2003-06-13 Fujitsu Ltd Method for manufacturing semiconductor device
US6624477B1 (en) 1992-10-09 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US6693301B2 (en) 1991-10-16 2004-02-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving and manufacturing the same
US6713783B1 (en) 1991-03-15 2004-03-30 Semiconductor Energy Laboratory Co., Ltd. Compensating electro-optical device including thin film transistors
US7071910B1 (en) 1991-10-16 2006-07-04 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device and method of driving and manufacturing the same
US7116302B2 (en) 1991-10-16 2006-10-03 Semiconductor Energy Laboratory Co., Ltd. Process of operating active matrix display device having thin film transistors
US7253440B1 (en) 1991-10-16 2007-08-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having at least first and second thin film transistors

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974438A (en) * 1972-10-10 1974-07-18
JPS54154992A (en) * 1978-05-29 1979-12-06 Seiko Epson Corp Semiconductor electrode substrate for liquid crystal panel drive

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974438A (en) * 1972-10-10 1974-07-18
JPS54154992A (en) * 1978-05-29 1979-12-06 Seiko Epson Corp Semiconductor electrode substrate for liquid crystal panel drive

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609286A (en) * 1983-06-28 1985-01-18 Seiko Epson Corp Video monitor by liquid crystal display
JPS61229103A (en) * 1985-04-04 1986-10-13 Canon Inc Controller of copying machine or the like
JPS63223788A (en) * 1987-03-13 1988-09-19 日本電気株式会社 Active matrix display device drive IC
JPS63307431A (en) * 1987-06-10 1988-12-15 Hitachi Ltd Thin film semiconductor display device
JPS642019A (en) * 1987-06-25 1989-01-06 Asahi Glass Co Ltd Active matrix type liquid crystal display element
JPS6445162A (en) * 1987-08-13 1989-02-17 Hitachi Ltd Manufacture of semiconductor device
JPS6352121A (en) * 1987-08-14 1988-03-05 Seiko Instr & Electronics Ltd Electrooptic device
US6486497B2 (en) 1988-05-17 2002-11-26 Seiko Epson Corporation Liquid crystal device, projection type display device and driving circuit
US6700135B2 (en) 1988-05-17 2004-03-02 Seiko Epson Corporation Active matrix panel
US6236064B1 (en) 1991-03-15 2001-05-22 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6713783B1 (en) 1991-03-15 2004-03-30 Semiconductor Energy Laboratory Co., Ltd. Compensating electro-optical device including thin film transistors
US6693301B2 (en) 1991-10-16 2004-02-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving and manufacturing the same
US7071910B1 (en) 1991-10-16 2006-07-04 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device and method of driving and manufacturing the same
US6759680B1 (en) 1991-10-16 2004-07-06 Semiconductor Energy Laboratory Co., Ltd. Display device having thin film transistors
US7253440B1 (en) 1991-10-16 2007-08-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having at least first and second thin film transistors
US7116302B2 (en) 1991-10-16 2006-10-03 Semiconductor Energy Laboratory Co., Ltd. Process of operating active matrix display device having thin film transistors
US5962897A (en) * 1992-06-18 1999-10-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6455875B2 (en) 1992-10-09 2002-09-24 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor having enhanced field mobility
US6624477B1 (en) 1992-10-09 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US8017506B2 (en) 1992-10-09 2011-09-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US7723788B2 (en) 1992-10-09 2010-05-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US7602020B2 (en) 1992-10-09 2009-10-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6790749B2 (en) 1992-10-09 2004-09-14 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US7109108B2 (en) 1992-10-09 2006-09-19 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device having metal silicide
JPH06151307A (en) * 1993-06-11 1994-05-31 Sanyo Electric Co Ltd Manufacture of thin film transistor circuit device
JPH07135323A (en) * 1993-10-20 1995-05-23 Semiconductor Energy Lab Co Ltd Thin film semiconductor integrated circuit and manufacturing method thereof
JPH07202215A (en) * 1994-12-05 1995-08-04 Hitachi Ltd Thin film semiconductor device and manufacturing method thereof
JPH0950045A (en) * 1995-12-15 1997-02-18 Seiko Instr Inc Semiconductor device, light valve device and projection device
US6472297B1 (en) 1998-03-31 2002-10-29 Matsushita Electric Industrial Co., Ltd. Method of producing TFT array substrate for liquid crystal display device
JP2003168691A (en) * 2001-11-30 2003-06-13 Fujitsu Ltd Method for manufacturing semiconductor device

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