JPS5852579A - Testing device of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To utilize an idle time between regular, tests, and to efficiently execute a self-test and calibration, by stopping an operation of an incorporated self-testing device, immediately before a testing element is connected to an adaptor for connecting an element to be tested. CONSTITUTION:To a testing signal generating and discriminating device 11, an element 13 to be tested is connected through an adaptor 12. The adaptor 12 is provided with a connection previous notice signal generating means, and in case of a regular device mode in which the element 13 is connected to the adaptor 12, a self-testing device 14 is stopped. In a state that a device test has ended and the adaptor 12 has been detached, the device 14 starts is operation as necessary, and the test and calibration regarding the device 11 and the adaptor 12 are executed. Subsequently, when the adaptor 12 is made to approach the element 13 and a connection previous notice signal is sent out to the device 14, the operation of the device 14 is stopped.

Description

[Detailed description of the invention] The present invention relates to a testing device for semiconductor integrated circuits.

In testing semiconductor integrated circuits, various input signals are applied to the device under test, and it is determined whether the output signal of the device under test conforms to a predetermined standard. In order to perform a good test, generation of these input signals and discrimination of output signals must be performed with sufficient accuracy, and for this purpose, performance testing and calibration of the test equipment itself are important issues.

FIG. 1 is a block diagram of an example of a conventional semiconductor integrated circuit testing apparatus. In FIG. 1, a test signal generation determination device 1
The input signal generated by the test signal is applied to the device under test 3 via the adapter 2, and the output signal generated by the device under test 30 is passed via the adapter 2 to the test signal generation/determination device 1 for pass/fail determination. The test signal generation/discrimination device 1 includes a pattern generation function, a timing generation function, and a driver for generating input signals, as well as a comparator for discriminating output signals, and a measurement power supply for applying DC voltage to the device under test 3. It is normal to have

The adapter 2 connects the device under test 3 and the test signal generation/determination device l, and is used as a prober when the device under test 3 is in the form of a wafer, or as a handler, IC socket, or on the board when the device under test 3 is mounted in a case. If it is mounted, a connector etc. will be used.

In the case of the device shown in Figure 1, tests and calibrations to ensure the accuracy of the test device itself are usually performed by connecting and testing a standard sample whose characteristics have been evaluated in advance in place of the device under test 3, or by using an adapter. The method used has been to replace each standard sample with a special jig for testing and calibration, but with the former method it is difficult to maintain the characteristics of the standard sample itself accurately, and with the latter method, it is difficult to actually Since it is difficult to reproduce the same conditions as when testing the device under test 3,
None of these methods can be said to be suitable for testing equipment for semiconductor integrated circuits, which have become increasingly faster and more integrated in large scale in recent years.

FIG. 2 is a block diagram of another example of an improved conventional semiconductor integrated circuit testing device. In FIG. 2, a device under test 3 is connected to a test signal generation/determination device 1 via an adapter 2. In FIG. The self-test device 4 sends a signal generated by a standard driver or comparator, for example, a standard driver, through a test signal generation determination device 11, and outputs the signal from the connection end of the adapter 2 with the device under test 3. A comparator in the test signal path discriminator 1 detects the reflected signal of By detecting the detected signal with a standard comparator in the self-testing device 4, testing and calibration can be performed in conditions close to the actual test conditions, including the signal transmission system of the adapter 2. However, in this case, in order to utilize signal reflection and to protect the device under test 3, it is necessary to operate the self-test device 4 with the device under test 3 not connected to the adapter 2. Self-testing is only possible during the time set aside for test calibration.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit testing device that can efficiently perform self-testing and calibration by actively utilizing the free time that occurs between normal tests.

To achieve this objective, the semiconductor integrated circuit testing apparatus of the present invention generates an input signal to be applied to a device under test, and determines whether an output signal of the device under test satisfies a predetermined standard. a test signal generation determination device;
Testing and calibrating the test signal generation discriminator including an adapter for connecting the test signal generation discriminator and the device under test, and a test signal path of the adapter in a state where the device under test is not connected to the adapter. The adapter further includes a connection notice signal generating means for generating a connection notice signal for stopping the operation of the self-test device immediately before the device under test is connected to the adapter. It is equipped with

The present invention will be explained below with reference to Examples.

FIG. 3 is a block diagram showing one embodiment of the present invention. In the figure, 11 is a test signal generation determination device, 125- is an adapter, 3 is a device under test, and 14 is a self-test device. In particular, the adapter 12 is equipped with a connection notice signal generating means. In such a test device, when the device under test 3 is connected to the adapter 12, that is, in the normal device test mode, the self-test device 14 is stopped, but when the device test is completed, the device under test 3 is disconnected from the adapter 12, the self-test device 14 starts operating as necessary, and the test signal generation discriminator jttll
A test calibration is performed on and adapter 12. Subsequently, when the next device under test 3 is connected to the adapter 12, if the adapter 12 is, for example, a connector for a board on which the device under test is mounted, the connecting terminal of the board and the welder of the connector are connected. When the two are brought close to each other for the purpose of testing, the adapter J2 detects this approach and sends a connection notice signal to the self-testing device 14 to stop the operation of the self-testing device 14 and return to the normal device test mode. After returning to , the device under test 3 and adapter 12
After that, a test signal is generated. 6- A device test using the insect bite separation device 11 is started.

As described above, according to the present invention, most of the free time between device tests can be saved without affecting normal device tests or adding any human operations. Since it can be used safely and reliably to self-calibrate semiconductor test equipment itself, it is relatively easy to maintain the performance of semiconductor integrated circuit test equipment, which has complex functions and requires high accuracy. Become.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a conventional semiconductor integrated circuit testing apparatus, FIG. 2 is a block diagram of another conventional example, and FIG. 3 is a block diagram of an embodiment of the present invention. 1.11...Test signal generation determination device, 2,12
...adapter, 3...device under test, 4
, 14... Self-test device. 7- Figure / Figure 2 Figure 3

Claims (1)

[Claims] A test signal generation/discrimination device that generates an input signal to be applied to a device under test and determines whether an output signal of the device under test satisfies a predetermined standard; the test signal generation/discrimination device and the device under test; and a self-test device for testing and calibrating the test signal generation discriminating device including the test signal path of the adapter when no device under test is connected to the adapter. The semiconductor integrated device further comprises a connection notice signal generating means for generating a connection notice signal for stopping the operation of the self-test device immediately before the device under test is connected to the adapter. Circuit testing equipment.