JPS5853685Y2 - DIN output circuit - Google Patents
DIN output circuitInfo
- Publication number
- JPS5853685Y2 JPS5853685Y2 JP17341876U JP17341876U JPS5853685Y2 JP S5853685 Y2 JPS5853685 Y2 JP S5853685Y2 JP 17341876 U JP17341876 U JP 17341876U JP 17341876 U JP17341876 U JP 17341876U JP S5853685 Y2 JPS5853685 Y2 JP S5853685Y2
- Authority
- JP
- Japan
- Prior art keywords
- din output
- output
- din
- output circuit
- stage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Amplifiers (AREA)
Description
【考案の詳細な説明】
本考案はカセットテープレコーダ等の低周波増幅回路よ
りDIN出力を取出すDIN出力回路に関するものであ
る。[Detailed Description of the Invention] The present invention relates to a DIN output circuit that takes out a DIN output from a low frequency amplifier circuit such as a cassette tape recorder.
第1図は従来の低周波増幅用の集積回路1及びスピーカ
回路2並びにDIN出力回路の一例を示す図である。FIG. 1 is a diagram showing an example of a conventional integrated circuit 1 for low frequency amplification, a speaker circuit 2, and a DIN output circuit.
集積回路1は主に、電圧増幅用の差動結合されたトラン
ジスタT1.T2及び同じく電圧増幅用のトランジスタ
T3、ドライバ一段を構成するトランジスタT4、並び
にパワ一段を構成するプッシュプル接続されたトランジ
スタT5゜T6よりなる。The integrated circuit 1 mainly consists of differentially coupled transistors T1 . It consists of T2, a transistor T3 for voltage amplification, a transistor T4 constituting one driver stage, and push-pull connected transistors T5 and T6 constituting one power stage.
そして、これ等はアウトプットコンデンサーを介するこ
となく直結接続されている。These are directly connected without going through an output capacitor.
Sl、S2はモニターオンON側若しくはモニターオフ
OFF側に連動して切換えられるモニター切換スイッチ
、53ts4は録音R側若しくは再生P側に連動して切
換えられる録音再生切換えスイッチである。SL and S2 are monitor changeover switches that are switched in conjunction with the monitor ON ON side or monitor OFF OFF side, and 53ts4 is a recording/playback changeover switch that is switched in conjunction with the recording R side or the playback P side.
そしてモニター切換えスイッチS1.S2をOFF側に
切換え、録音再生切換えスイッチS3.S4をP側に切
換えた場合に、出力抵抗R□を介してDIN出力が取出
される構成となっていた。And monitor changeover switch S1. Switch S2 to the OFF side, and turn the recording/playback selector switch S3. The configuration was such that when S4 was switched to the P side, the DIN output was taken out via the output resistor R□.
籾で、今、DIN出力を外部大出力の増幅器(図示せず
)に接続して外部スピーカ(図示せず)を駆動する場合
について考えると、電源Vccは集積回路1に接続され
ると共にテープレコーダ本体側のモータ、スイッチ(図
示せず)等にも接続されている為、これらのスイッチノ
イズ、ハム音等が第1図破線の経路にて外部の大出力の
増幅器に加わって増幅され、突発的に外部スピーカを駆
動し、このスピーカを破壊する惧れがあった。Considering the case where the DIN output of rice is connected to an external high-output amplifier (not shown) to drive an external speaker (not shown), the power supply Vcc is connected to the integrated circuit 1 and connected to the tape recorder. Since it is also connected to the motor, switch (not shown), etc. on the main unit side, these switch noises, hum sounds, etc. are amplified by being amplified by the external high-output amplifier via the path shown by the broken line in Figure 1. There was a risk that the external speaker would be driven and the speaker destroyed.
更に、電源Vccを切断する際には、モータの逆起電力
にて集積回路1が駆動され、モータのガバナーノイズが
前記と同様の経路を介してスピーカに印加されるという
不都合があった。Furthermore, when the power supply Vcc is cut off, the integrated circuit 1 is driven by the back electromotive force of the motor, and the governor noise of the motor is inconveniently applied to the speaker via the same path as described above.
また前段の音量可変抵抗器(図示せず)を最大にした場
合には集積回路1のパワ一段が飽和してしlい、結局ク
リップされた出力しかDIN出力として取出すことが出
来ないという不都合もあった。Furthermore, if the volume variable resistor (not shown) in the previous stage is maximized, the power level of the integrated circuit 1 will be saturated, resulting in the inconvenience that only the clipped output can be taken out as the DIN output. there were.
そこで本考案に於いてはドライバ一段を構成するトラン
ジスタT4より抵抗R1を介してDIN出力を取り出す
様に構成したものである(第2図参照)。Therefore, in the present invention, the DIN output is taken out from the transistor T4 constituting one stage of the driver via the resistor R1 (see FIG. 2).
斯様に構成すれば、DIN出力はクリップなしで取出す
ことができ、また前述した如きスイッチノイズ、ハム音
、モータノイズ等の雑音がDIN出力に混入することを
防止でき、これ等の雑音により外部の大出力増幅器に接
続された外部スピーカを破壊することもない。With this configuration, the DIN output can be taken out without a clip, and it is also possible to prevent noise such as switch noise, hum noise, motor noise, etc., from being mixed into the DIN output as described above. It will not destroy external speakers connected to high output amplifiers.
更に、前段には音量可変抵抗器が接続されているので、
DIN出力のレベルを可変することもでさる。Furthermore, since a volume variable resistor is connected to the front stage,
It is also possible to vary the level of the DIN output.
図面は倒れも低周波増幅用の集積回路及びスピーカ回路
並びにDIN出力回路を示すものであり第1図は従来例
、第2図は本考案の一実施例である。The drawings show an integrated circuit for low frequency amplification, a speaker circuit, and a DIN output circuit, with FIG. 1 showing a conventional example and FIG. 2 showing an embodiment of the present invention.
Claims (1)
パワ一段を有する主増幅器としての低周波増幅回路のド
ライバ一段よりDIN出力を導出することを特徴とする
DIN出力回路。A DIN output circuit is characterized in that a DIN output is derived from a driver stage of a low frequency amplifier circuit as a main amplifier, which has a volume variable resistor connected to its front stage and has one driver stage and one power stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17341876U JPS5853685Y2 (en) | 1976-12-20 | 1976-12-20 | DIN output circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17341876U JPS5853685Y2 (en) | 1976-12-20 | 1976-12-20 | DIN output circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5387620U JPS5387620U (en) | 1978-07-19 |
| JPS5853685Y2 true JPS5853685Y2 (en) | 1983-12-06 |
Family
ID=28780912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17341876U Expired JPS5853685Y2 (en) | 1976-12-20 | 1976-12-20 | DIN output circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5853685Y2 (en) |
-
1976
- 1976-12-20 JP JP17341876U patent/JPS5853685Y2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5387620U (en) | 1978-07-19 |
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