JPS5853834A - Etching method for compound semiconductor - Google Patents

Abstract

PURPOSE:To prevent the production of an oxide film on the crystal surface resulting in the facilitation of the etching by a method wherein a no Al contained protection layer is provided on the crystal surface of a compound semiconductor wherein Al is contained as the constituent in continuity to this crystal growth resulting in a fixed pattern, and thereafter the reactive ion etching by using gas containing chlorine is performed. CONSTITUTION:A GaAlAs layer 2 is epitaxial-grown on a GaAs substrate 1, and the no Al contained GaAs protection layer 3 is adhered in continuity thereto. Thus, since the lattice alignment of the layers 3 and 2 is excellent, useless strains do not generate on the layer 2. Next, a resist 4 is applied on the layer 3 resulting in a pattern, and with this as a mask the layer 2 of the exposed part is etched so as to become a fixed thickness by the Cl2 gas by using a parallel- flat type reactive ion etching device. Thus, an Al2O3 film which prevents the etching does not generate on the surface of the layer 2 resulting in the facilitation of the etching.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for etching a compound semiconductor, particularly a compound semiconductor containing Mut as a constituent element.

In recent years, various semiconductor -yhΔ devices, such as semiconductor radars and light emitting diodes, have been developed using carbon dioxide group compound semiconductors such as GaAs and InP as substrates.

In addition to these semiconductor radars and light emitting diodes, we also have field effect transistors of various structures with high performance, such as those using the conventional 81 as a substrate, integrated circuits of these, and electrical integrated circuits. A new concept device called an opto-electrical integrated circuit, which integrates a light-emitting element and a light-receiving element, has been developed.

On the other hand, in the manufacturing process of semiconductor devices, drying of each process is being promoted from the viewpoint of improving productivity and reproducibility. The reactive ion etching method is an important technology in this dry norocess, and by selecting appropriate conditions, this reactive ion etching method can vertically etch a mask gloss turn of about 1 [μm]. Therefore, it has become unsuitable for manufacturing high-density, high-performance integrated circuits, etc., in place of wet etching, which generally tends to produce undercuts and side etching. However, in reactive ion etching of compound semiconductors, it is necessary to create conditions in which multiple types of atoms form highly volatile molecules and become gases! R, S
14? Currently, it is more complex than metals, and much is still unknown.

Multiple GaAt with different ht compositions using GaAs as a substrate
Light emitting diodes, semiconductor lasers, photodiodes, or integrated elements thereof are manufactured by laminating As layers. Reactive ion etching, which allows vertical etching, appears to be an extremely effective technique for these devices as well. For example, in the case of semiconductor Radhe resonators, the end faces of the Rade resonator were made through manual labor, an extremely low-productivity process. However, by using reactive ion etching, end faces can be formed in monolithic material, which has industrial value. It's also expensive. In addition, the reactive ion etching method is an extremely effective method for mesa etching of buried radars, substrate processing, and hole drilling of ballistic light emitting diodes.

By the way, as a reactive ion etching gas for GaAs, CC4+F! # Ct2 gas is known, but reactive gas for GaAjAs crystal is not known. The inventor's experiments also confirmed that GaAAAm was not etched with the above gas. In the case of GaAs mu, this is thought to be caused by the mu t contained in its components. On the other hand, a method using a gas containing chlorine such as Cl3 e CCL4sBC1 is known as an AL gold metal etching gas, but due to this fact, GaAtAs was not etched when etching was performed using ct gas. .

The present invention has been made in consideration of the above-mentioned circumstances, and its purpose is to provide a method for etching compound semiconductors by which compound semiconductors including GaAjAs and the like can be easily etched by reactive ion etching. It is about providing.

First, the present invention will be explained in detail. GaAAAm's At
Compound semiconductors containing . and,
The reason why GaAjAs crystal is not etched is as follows.
It is thought that this is because the oxide film formed on the crystal surface prevents etching. Therefore, this surface oxide II should be removed or prevented from forming.
It is expected that aAtAs[& will be etched.

The present invention focuses on these points, and after forming a protective layer that does not contain Mutt on the crystal surface of a compound semiconductor containing At as a constituent element continuously with the crystal growth of the compound semiconductor, the surface of the protective layer is selectively A mask pattern is formed by altering the structure or depositing a mask material on the surface of the protective layer, and then selectively etching the compound semiconductor using a reactive ion etching method using a chlorine-containing gas as a reactive gas. This is the method.

Therefore, according to the present invention, a protective layer that does not contain MuL is formed on the crystal surface of a compound semiconductor containing Mut as a constituent element, following the crystal growth of the compound semiconductor.
Formation of an oxide film on the surface of the compound semiconductor and the surface of the protective trowel layer can be prevented. For this reason, GaAAAs
Compound semiconductors containing IQ and Ajl can be easily etched by the reactive ion etching method, and are extremely effective for drive processing of semiconductor radars, light emitting diodes, etc.

Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIGS. 1 to 3 are schematic cross-sectional views each showing the manufacturing process of an embedded type semiconductor radar according to an embodiment of the present invention. First, as shown in FIG. 1, a GaAjAs layer 2 is grown on a GaAs substrate 1, and following this growth, a G1 layer (protective layer) 3 is formed on the surface of the GaAtAs layer 2. , GaAs crystals can be grown continuously with the growth of GaAtAs crystals, and GaAs crystals can be grown continuously with the growth of GaAtAs crystals.
Since it has good lattice matching with the s-crystal, it does not cause unnecessary strain on the GaAtAs crystal. Next, as shown in FIG. 2, a resist 4 was applied onto the protective layer 3, and 29 turns were formed using the resist 4. Thereafter, using the resist 4 as a mask, high frequency power 3 is applied using a parallel plate type reactive ion etching device.
00 [W), CA, gas BE-0,05 (Torr)
When etching was performed under the following conditions, #! As shown in FIG. 3, the protective layer 3 and the GaAIAa layer 2 were selectively etched. In addition, the depth of etching and the shape of @
It was confirmed that this can be controlled by changing conditions such as high-frequency power and gas pressure. Furthermore, after this, a buried layer is formed on the GaAjAm layer 2 to form a buried semiconductor laser.

Thus, according to the method of this embodiment, GaAs is grown on the surface of the GaAjAi layer 20 following the crystal growth of the GaAtAs layer 2.
Since the layer 3 is grown, it is possible to prevent the formation of an oxide film that inhibits etching. For this reason, G
aAjAs layer 2'ft by reactive ion etching method]
Can be easily etched. Therefore, it is extremely effective in forming a mesa shape when manufacturing a buried semiconductor radar. Further, as mentioned above, since the GaAs layer as the ambiguity layer 3 has good crystal consistency with the GaAjAs layer 2, problems such as unnecessary distortion in the GaAjA1 layer 2 can be avoided.

Note that the present invention is not limited to the embodiments described above. For example, in addition to GaAs, the film holding layer may be made of GaAs.
InGaP'PInGaAs lattice matched with AjAs
P4! may also be used. Furthermore, it is not always necessary to achieve lattice matching (polycrystals such as Ga-P may also be grown). Any gas that can continuously form a film on the surface may be used.In addition, in the examples, ct2f gas is used as the reactive gas, but any gas that can etch Ga&LAs and the storage layer may be used. Of course, etching is also prevented by oxide films on the front and surface surfaces, which always occurs in various compound semiconductors that use A as a constituent element, not just GaAtAm.For example, G1 The same applies to compound semiconductor crystals such as ZnP. Therefore, it is applicable not only to GaAjAm but also to any compound semiconductor containing Mut as a constituent element.
Various modifications can be made without departing from the spirit of the invention.

[Brief explanation of the drawing]

Figures m1 to 3 are schematic cross-sectional views showing a manufacturing process of an embedded semiconductor radar according to an embodiment of the present invention. 1...GamuS substrate, 2-・C-aAtAs)6
．． 3-.GaAs NI (protective layer). Applicant's representative Patent attorney Takeshi Suzue Hikoga 1 Figure 2 Figure 3 Figure 3

Claims (4)

[Claims] (1) After growing a protective film layer that does not contain At on the crystal surface of a compound semiconductor containing HT as a constituent element following the crystal growth of the skeleton compound conductor, the surface of the heating layer is selectively altered. Alternatively, a mask material is applied to the surface of the protective layer to form a mask pattern, and then the protective layer and the compound semiconductor are etched by reactive ion etching using a chlorine-containing gas as a reactive gas. A method of etching compound semiconductors using selective etching as mold. (2) The method for etching a compound semiconductor according to claim 1s1, wherein the compound semiconductor is made of GaAtAs. (3) The method for etching a compound semiconductor according to claim 2, wherein the protective trowel layer is made of GaA. (4) The method for etching a compound semiconductor according to claim 1, characterized in that Ct is used as the reactive gas.