JPS5854729A - Forecasting decoding device - Google Patents

Abstract

PURPOSE:To obtain a forecasting encoder of nonrecursive type in which a picture signal can be encoded and decoded with a prescribed bit rate, by providing a pre-processing circuit such as band limit circuit, quantization circuit and thinved-out control circuit. CONSTITUTION:A picture signal inputted to an input terminal 1 is converted into a digital signal at an A/D converter 2 and quantized at a quantizing circuit 4. In this case, a control circuit 11 selects the quantizing characteristics with minute accuracy when the amount of information of a buffer memory 10 is less, and selects a coarse quantizing characteristic when that of the memory 10 is much. A forecasting device 6 outputs a forecasting signal, which is converted into a forecast error signal at a subtractor 7 and transmitted to a transmission line via an unequal length coding circuit 9. A decoder 14 stores the information to a buffer memory 16, performs inverting coding conversion corresponding to the code converting characteristics provided for the circuit 9 at an unequal length decoding circuit 17, and obtains a quantized forecast error signal, which is summed with the forecasting signal from a forecasting device 21 to be a decoding signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a predictive decoding device, and particularly to a predictive coding device that obtains a decoded signal from a signal obtained by unequal length coding of a prediction error signal.

DI""CM (D
ifferential Pulse Code Mo
(duration) encoding devices are well known.

This DPCM encoding device.

The DPCM encoder is configured to subtract a prediction signal obtained by a predictor from an input signal to obtain a prediction error signal, and quantize the prediction error signal by a quantizer. Then, the quantized prediction error signal is encoded and transmitted. and.

A feedback loop is provided for adding the prediction error signal quantized by the quantizer and the prediction signal output from the predictor to obtain a locally decoded signal, and sending the locally decoded signal to the predictor. The predictor outputs the next predicted signal based on the received locally decoded signal. That is.

The DPCM encoder including a predictor and a quantizer is a cursive-type predictive encoder with a feedback roof.

In recent years, methods have been developed in which the quantization characteristics and prediction functions of a quantizer are adaptively switched. However, when applying these methods to a DPCM encoding device, DPC
Since the M encoder is constructed of a recursive type, it has the disadvantage that extremely high-speed circuit elements are required in order to perform complicated processing such as the above-mentioned adaptive encoding. Also real time DPC
The disadvantage of not performing M processing is that the processing time for the encoding loop is insufficient.

On the other hand, there is a predictive encoding device with a non-liquor knob type predictive encoder without a feedback loop.

This is a reversible predictive coding device that does not have a quantizer that quantizes the prediction error signal and can decode the original signal from the prediction error signal. In other words, it is a predictive coding device that can store information. The prediction error signal is converted into an unequal length code and transmitted.

According to the predictive encoding device, there is no need for processing time for quantization. Still, the predictive encoder is non-recursive tights 0 (this is because there is no feedback roof 0)
Since the input signal and the predicted signal output from the predictor are configured in a word type (also known as a word type), the input signal and the predicted signal output from the predictor are matched in relative phase, and both signals are delayed by an appropriate amount.

Signal processing time can be extended. As a result,
A circuit configuration using low-speed elements is possible.

'-1 makes it possible to perform complex signal processing such as the above-mentioned adaptive predictive coding. However, with this non-recursive tights 0 (i.e. forward type 0) pre-6111 encoding device, since it is not possible to control the information amount of the input/output signal, it encodes a long-term continuous TV signal etc. in real time and maintains a fixed transmission bit. The drawback was that it could not be rated.

An object of the present invention is to obtain a decoded signal by receiving output information from a non-recursive type (i.e., forward type) predictive encoding device that can encode and transmit an image signal such as a TV signal at a constant transmission bit rate. The purpose of the present invention is to provide a predictive decoding device that can perform the following tasks.

Another object of the present invention is to perform preprocessing by monitoring the amount of information input to a first buffer memory or the amount of information accumulated in the first buffer memory for temporarily storing and smoothing output information before sending it out. A decoded signal can be obtained by receiving output information from a predictive coding device of non-recursive tights (i.e., forward tie f) that adaptively controls the amount of information of the input signal at the section and controls the amount of information to be transmitted. An object of the present invention is to provide a predictive decoding device.

According to the present invention, according to the control signal determined based on the amount of information input to the first buffer memory or the amount of information stored in the first buffer memory.

The amount of information in the digitized image signal is controlled, the image signal whose information amount has been controlled is predictively encoded to obtain a prediction error signal, and the prediction error signal is encoded into a non-uniform (5) long code. The above output from the predictive encoding device which obtains equal length code information, and wherein the first buffer memory temporarily stores and smoothes the unequal length code information and control information necessary for decoding, and sends out the smoothed information as output information. A predictive decoding device that takes information as input information, and includes a second memory that stores the input information, converts the speed, and sequentially outputs the information, and a second buffer memory that converts the information output from the second buffer memory into the unequal data. an unequal length decoding circuit that separates long code information and the control information and converts the unequal length code information into the prediction error signal; and the prediction error signal output from the unequal length decoding circuit. and receiving the control information.

A predictive decoding device is obtained, comprising a predictive decoder that predictively decodes the predictive error signal according to the control information and outputs the digitized image signal.

In addition, in the predictive encoding device, the image signal (6) is digitized according to a control signal determined based on the amount of information input to the first buffer memory or the amount of information stored in the first buffer memory. Specifically, the preprocessing circuit that controls the amount of information in (
1) a quantization circuit capable of quantizing the dinotated image signal according to a quantization characteristic selected by the control signal; or (2) a decimation characteristic selected by the control signal.

A first control for determining pixels to be thinned out from the dinotalized image signal, a second control for actually thinning out the pixels to be thinned out, and thinning out of surrounding signals of the pixels to be thinned out. Among the third controls, interpolation is performed using signals of pixels that should not be used.

(3) a decimation control circuit that is capable of performing at least one control on the dinotalized image signal; or (3) a decimation control circuit that is capable of performing at least one control on the dinotalized image signal; a band-limiting circuit capable of band-limiting at least one of a spatial frequency and a frequency in the time axis direction; or (4) at least two of the quantization circuit, the thinning control circuit, and the band-limiting circuit. It consists of a circuit that combines the following.

Here, thinning refers not only to removing pixels one by one, but also to removing all pixels in an appropriate section, or removing all pixels in one field for each appropriate field, etc. Quality TV signal transmission can be achieved.

Next, two embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, there are shown a predictive encoding device 3 and a predictive decoding device 14 according to a first embodiment of the present invention.

In this embodiment, a quantization circuit 4 is used as a preprocessing circuit of the predictive encoding device 3. The analog NTSC color TV newsletter image signal input to input terminal 1 has a sampling frequency f8 of 3 of the sub-gear frequency fSC.
The digital signal 9 is converted by the A converter 2 which is selected to be a 5-bit PC with a level range of -16 to 15, for example.
M (Pulse Code Modulation)
image signal. Sampling frequency f8 is fs”
” In the case of 3-f8c, the Zantzor number nIT during the horizontal scanning period is n1l-6825. A, 4) The output signal of the converter 2 is sent to the quantization circuit 4 of the predictive coding device 3. Quantization The circuit 4 can quantize the input image signal according to the quantization characteristic selected by the control signal sent from the control circuit 11. The control circuit 11 can adaptively quantize the input image signal according to the amount of information stored in the memory 10. The control circuit 11 controls switching of the quantization characteristic of the quantization circuit 4. When the amount of information stored in the buffer memory 10 is small, the control circuit 11 selects a fine quantization characteristic with the same precision as the input signal to the quantization circuit 4. Accordingly, the quantization circuit 4 outputs the 5-pino l-PCM image signal as it is.On the other hand, the buffer memory 10
When the amount of information stored is large, the control circuit 11 selects the sum quantization characteristic. As a result, the quantization circuit 4 outputs a coarsely quantized image signal 2, for example, an image signal quantized to 3-bit PCM. The image signal quantized by the quantization circuit 1 is sent to a subtraction circuit 7 of a predictive encoder 5 and a predictor 6. Predictor 6 is.

A predictive function P field of predetermined integer coefficients) P(Z
) = Z-" +Z-2no -Z-211H-1(
A predicted signal is obtained from the image signal quantized according to the characteristics of 1) and output. The pre-(9) sub-signal output from the predictor 6 is sent to a subtracter 7. The subtracter 7 subtracts the prediction signal from the quantized image signal and outputs a prediction error signal. This prediction error signal is sent to the unequal length encoding circuit 9 of the unequal length encoder 8. The unequal length encoding circuit 9 has multiple types of code conversion characteristics corresponding to the quantization characteristics that the quantization circuit 4 has.

The prediction error signal is converted into an unequal length code according to the code conversion characteristic selected by the control signal from the control circuit 11. The unequal length code output from the unequal length encoding circuit 9 is sent to a buffer memory 10. The information tU sent to the buffer memory 10 changes from moment to moment depending on the image signal input to the predictive encoding device 3. Buffer memory 1
0 comes from the unequal length encoding circuit 9. Both information on the unequal length code and control information such as control signals and synchronization signals required for decoding are temporarily stored in the buffer memory 10.

The speed is converted to match the transmission speed of the transmission line, and the output information is sent to the transmission line from the output terminal 12. The output information of the output terminal 12 is sent to the Magnetic Ta
It is also conceivable to store the data in a storage device such as pe) (10). The control circuit 11 monitors the amount of information stored in the buffer memory 10.

The control circuit 11 determines whether to switch the quantization characteristic based on the amount of information stored from the buffer memory 10 at appropriate outer cycles, and changes the quantization characteristic of the quantization circuit 4 and the code conversion characteristic of the unequal length encoding circuit 9. Outputs a control signal to switch.

The above is an explanation of the operation of the predictive encoding device 3.

In the predictive decoding device 14, information sent from the transmission path is sent from the input terminal 13 to the buffer memory 16 of the unequal length decoder 15. Information is temporarily stored in the buffer memory 16 at the transmission speed sent from the transmission path. The information once recorded is sequentially read out according to requests from the unequal length decoding circuit 17 of the unequal length decoder 15 and sent to the unequal length decoding circuit 17. The unequal length decoding circuit 17 separates the information of the quantization control signal and the information of the unequal length code, and sends the separated control information to the quantization circuit 40 .

The unequal length decoding circuit 17 has inverse code conversion characteristics corresponding to the code conversion characteristics of the unequal length encoding circuit 9 of the predictive encoding device 3. This unequal-length decoding circuit 17 obtains each unequal-length code from the unequal-length code string separated by two, and selects an inverse of the unequal-length code obtained by the first one by a control signal separated by one. Inverse code conversion is performed according to code conversion characteristics, and a quantized prediction error signal is output. The obtained prediction error signal is sent to the adder 20 of the prediction decoder 19.

It is added to the prediction signal sent from the predictor 21 having integer coefficients of the prediction decoder 19, and becomes a decoded signal. The decoded signal becomes equal to the signal received by the m:child preprocessing input to the predictive encoder 5 unless the quantization characteristic of the childization circuit 4 is switched by the control signal. However, since the signal with the quantization characteristic of the quantization circuit/1 has the accuracy of the quantization characteristic before switching, it does not match the accuracy of the prediction error signal output from the unequal length decoding circuit 17. do not. Therefore, the decoded signal output from the adder 20 does not necessarily match the signal input to the predictive encoder 5.

The decoded signal output from the adder 20 is sent to the quantization circuit 40, and the quantization circuit 40 converts the decoded signal into an input signal to the predictive encoder 5 based on the control signal from the unequal length decoding circuit 17. Perform processing to match. In addition to the method of quantization, matching processing is also possible if the value of the decoded signal contains a value in the lower bits than the precision of the quantization characteristic selected by the control signal. There is a method of performing addition and subtraction to cancel the error value of . The decoded signal output from the quantization circuit 40 is sent to the predictor 21 and the D/
The signal is sent to the A converter 22. The predictor 21 uses a prediction function P□ with the same integer coefficients as the predictor 6 of the predictive encoding device 3 has.
□□), and outputs a predicted signal of the next sampling time from the decoded signal according to the prediction function and sends it to the adder 20. D/
The A converter 22 performs D/A conversion on the Dinotal decoded signal and outputs an analog decoded signal to the output terminal 23. Note that in order to reset the propagation of errors due to errors in the transmission path, the signals of each part are initialized at appropriate intervals.

The above is an explanation of the operation of the predictive decoding device 14.

(13) FIG. 2 is a specific circuit example of the quantization circuit 4 of the predictive encoding device 3 in the first embodiment of the present invention. The quantization circuit 4 converts the 5-bit PCM signal X expressed in two's complement into three parts according to the control signal QS from the control circuit 11.
~ Quantize to 5 bits and output. The above 5-bit PC
The least significant digit (LSD) of the M signal X is Xl and has a magnitude of 1.

The most significant digit (MSD) is a sign that indicates positive or negative in X8. 5-bit PCM signals X1dX3 to x8 input to the quantization circuit 4! The upper 3 bits at f, are sent as they are to the output terminals y, ~ys, and the lower X2
The bits of and xl are sent to AND circuits 28 and 29, respectively. Of the 3-bit control signal QS sent from the control circuit 11, the +QS2 bit is connected to the inversion circuit 26, the +QSl bit is connected to the inversion circuit 27, and +QSo is not connected.

The control signal QS sets one of the bits QSo to QS2 to a high level indicating 1 of positive logic, and sets all other bits to a low level indicating 0 of positive logic. The output of the inversion circuit 26 is sent to the AND circuit (14) 28 and 29, and the output of the 2-inversion circuit 27 is sent to the AND circuit 29. Therefore, when the QSo bit of the control signal QS goes high and the first quantization characteristic is selected, the 5-bit input signal is output as the shunted output signal Y. Also.

When QSl becomes High level and the second quantization characteristic is selected, the bit of yl becomes Low level and a 4-bit quantized signal is output. -1 +Q
When S2 suddenly becomes High level and the third quantization characteristic is selected, y and y2 always become Low level and a 3-bit quantized signal is output.

FIG. 3 shows a specific circuit example of the predictor 6 of the predictive encoding device 3 in the first embodiment of the present invention.

This predictor 6 uses the function shown by the above equation (1) as the prediction function p(z). Prediction function P of this equation (1)
□□□) is.

An NTSC color TV signal when sampling is performed with the sampling frequency fs selected to be three times the subcarrier frequency fsc can be efficiently and directly predictively encoded. However, since ' fS "" is 3 fsc, + n11-" is 682.5 in equation (1), and Z-1-
It is e-j27c/fS. The predictor 6 converts the input signal into
1. Output terminals 102 that output with a delay of 1365 and 1366 sampling clock periods, ] 03 and 10
4, a shift reno star 101 having terminals 102 and 1
an adder 105 that adds the signal at terminal 03; and a subtracter 106 that subtracts the signal at terminal 104 from the output signal of the adder 105.
This is a non-recursive type dinotal filter consisting of. All the 6111 coefficients in equation (1) are integers.

The predictor 21 of the predictive decoding device 14 is also configured similarly to the predictor 6.

Next, a specific example of the code conversion characteristics of the unequal length encoding circuit 9 and the inverse code conversion characteristics of the unequal length decoding circuit 17 will be shown. In this case, since the two image signals are 5 bits, 32 unequal length codes whose code numbers are -16 to 15 shown in the primary table are used.

Below, the shortest code length for all days is 2 bits and the longest code length is 9 bits. The magnitude of the 5-bit (17) PCM signal (LSI) output from the converter 2 is set to 1, and the prediction error signal sent from the subtracter 7 to the unequal length encoding circuit 9 is expressed as e.
When the code number of the unequal length code is N and X is a real number, the symbol [X] is n < x, where n is an integer.
(The value of n that satisfies the inequality n -1-1. In other words, the symbol [ ] represents integerization by truncation. 1. The 1. corresponding to the 2.nd and 3. quantization characteristics. The second and third code conversion characteristics are as follows.

It has a characteristic of converting the prediction error signal e into unequal length codes of code numbers N shown by equations (2), (3), and (4), respectively.

N-[e] (2) N-[u:] (3) N-[see] (4) For example, the base for the second code conversion characteristic is + e-2's prediction error signal is from (3) It becomes N--1 and is converted into an unequal length code of "11". Here, since the prediction coefficients are integer coefficients, unless the quantization characteristics are changed, the quantization accuracy of the input signal to the predictive encoder 5 and the prediction signal match. That is, the accuracy of the input signal of the predictive encoder 5 and the prediction error signal match.

(18) 1st. The prediction error signal e when each of the second and third quantization characteristics is selected is an integer, an integer multiple of 2, and an integer multiple of 4, respectively. There is a one-to-one correspondence with the code number.

Next, the inverse code conversion characteristics of the unequal length decoding circuit 17 are as follows. If the code number of the unequal length code reprinted by the unequal length decoding circuit 17 is N, and the prediction error signal obtained by the inverse transformation is the sum, then 1. The first .corresponding to the second and third quantization characteristics. The second and third inverse code conversion characteristics convert the unequal-length code with month number N into (5), 9 (6), and (7), respectively.
It has the characteristic of inversely transforming the prediction error signal shown by the equation.

Order-N(5) e = 2 X N (6) e = 4 be done.

In order to perform information-preserving encoding, that is, to make the decoded signal of the predictive decoding device 14 coincident with the input signal to the predictive encoder 5, basically.

It is necessary to provide quantization circuits on the output sides of the predictors 6 and 21, respectively, and perform quantization so that the quantized prediction signal matches the accuracy of the fanning of the input signal to the prediction encoder 5. However, when the prediction coefficients are only integer coefficients,
As shown in the first embodiment VC, by providing the quantization circuit 40 or means for performing processing equivalent thereto,
Information 1 (r) can be encoded. (shoulder-child conversion circuit 40
One method for performing equivalent processing is to reset the values of predetermined renostars in the predictors 6 and 21 when the quantization characteristic of the quantization circuit 4 is switched.

Next, in FIG. 1, the prediction function p of the predictors 6 and 21 is
A method of encoding information preservation when the coefficients of (z) are not integers will be described. The first method is to provide a quantization circuit on the output side of the predictors 6 and 21, as described above. The second method is to implement the first method in a two-equivalent manner by devising the code conversion characteristics of the unequal length encoding circuit 9 without providing a quantization circuit on the output side of the predictor 6. . Hereinafter, FIG. 4, which shows the configuration for achieving the second method, will be explained.

Referring to FIG. 4, a predictive encoding device 3 and a predictive decoding device 14 according to a second embodiment of the present invention are shown. FIG. 4 shows the decoding of the quantized image signal output from the quantization circuit 4 of the predictive coding device 3 and the predictive decoding device 14 using the prediction function of the coefficients with the decimal point removed in FIG. 1. A quantization circuit 40 is provided on the output side of the predictor 41 so that the signals match. Furthermore, the fourth
In the figure, the prediction functions of the predictors 107 and 41 and the code conversion characteristics of the unequal length encoding circuit 108 are different from those in FIG. The other parts have the same functions as the same parts in FIG. 1 and perform similar operations.

The decoded signal output from the adder 20 of the predictive decoding device] 4 is supplied to the D/A converter 22 and the predictor 41. The predictor 41 obtains a predicted signal according to the prediction function and sends it to the quantization circuit 40 . The quantization circuit 40 is
The predicted signal is quantized and output according to the quantum characteristic selected by the control signal from the unequal length decoding circuit 17 (21), and the quantized predicted signal is input to the adder 20. .The adder 20 is.

The output signal of the quantizer 40 and the reproduced prediction error signal sent from the unequal length decoding circuit 17 are added to output a decoded signal equal to the signal input to the prediction encoder 5.

The quantization circuit 40 has the same quantization customization characteristic as the quantization circuit 4 of the predictive encoding device 3, and is constructed of (as shown in FIG. 2). It's been a long time since I've been in the middle of a long time.

FIG. 5 shows a specific circuit example of the prediction 7i107 shown in FIG. In this predictor 107, the sampling frequency f8 is the Zab Gearia frequency f. Two prediction functions are provided as prediction functions that can efficiently predict a color TV signal when the color signal is three times as large as . The first prediction function P1(Z) is
It is a prediction function with a prediction coefficient below the decimal point, and (8
) is shown by the formula.

P, (Z)=0.5Z-1-1-Z'-0,5Z-4(
8) Second prediction function P2 (2)) f-1: This is a prediction function that performs prediction from two lines before, and is expressed by equation (9).

(22) P2(Z)-Z u (however, n1l-682,5
) (9) Then, compare the predicted signals by the two prediction functions and the input signal to the predictor 107 (locally decoded signal).

A function that outputs a prediction signal close to the input signal to the predictor 107 is used for the next prediction.

The quantized image signal input to the predictor 1.07 is
The first prediction circuit 42 has the characteristics of the prediction function of equation (8).
and is input to the second prediction circuit 43 and the 9-judgment circuit 44, which have the characteristics of the prediction function of equation (9).

The first prediction signal output from the first prediction circuit 42 is
is input to terminal a of the switching circuit 45 and the 2 judgment circuit 44,
The second prediction signal output from the second prediction circuit 43 is
The signal is input to the terminal of the switching circuit 45 and the judgment circuit 44. The determination circuit 44 determines which prediction signal is closer to the quantized input signal to the prediction gs 107,
If the first prediction signal is closer to the input signal to the predictor 107, a selection signal of 0 is output, and if the second prediction signal is closer, a selection signal of 1 is output. The selection signal is delayed by one sampling clock cycle by the renostar 46 and then sent to the switching circuit 45. Switching circuit 45 U: When the selection signal is O, the switch outputs the first prediction signal of terminal a, and when the selection signal 2 is 1, it outputs the second prediction signal of terminal S. In this way, either the first or second predicted signal is selected and the predicted signal is output from the output of the predictor 107.

The predictor 111 of the predictive decoding device 14 is also configured similarly to the predictor+07.

Since switching is performed using information from this adaptive prediction (d:1 sample), there is no need to transmit a signal for switching the prediction function.

FIG. 6 shows a specific circuit example of the first prediction circuit 42 and the second prediction circuit 43 in the predictor 107 shown in FIG. The first prediction circuit/I2 delays the input signal by one sampling clock cycle and outputs the delayed signal.
, 35 and 38, the subtracter 33, the adder 37, and 05
It is composed of a non-recursive Tizo dinotal filter having multiplication coefficients of 2, 31 and 36. The second prediction circuit 43 is composed of a /ftrenostar 39 that delays the input signal by 1365 sampling clock cycles and outputs the delayed signal.

FIGS. 7(a) and 7(b) are respectively for the embodiment of FIG. 4. 3 is another circuit example of the predictive decoder 24 including the quantization circuit 40. FIG. In FIG. 7(a), the prediction signal output from the predictor 41 and the reproduced prediction error signal sent from the unequal length decoding circuit 17 are added by the adder 20, and then quantized. The signal is quantized by a circuit 40 and made into a decoded signal. In Figure 7(b),
The decoded signal obtained from the adder 20 is quantized by a quantization circuit 40 and then sent to a predictor 41.

7(a) and 7(b) each perform the same operation as the predictive decoder 24 of FIG. 4.

The code conversion characteristics of the unequal length encoding circuit 108 in FIG. 4 are as follows. Let e be the prediction error signal sent to the unequal length encoding circuit 108, let N be the code number of the unequal length code,
When X is a real number, the symbol <x> is + with n being an integer.
n −1, (x < n + 1) represents the directness of n that satisfies the inequality. In other words, the symbol (25) represents integerization by rounding up. 1. Second and third quantization first, second and third corresponding to the characteristics
The code conversion characteristics of each of the prediction error signals e are (10) ?
It has the characteristic of converting into an unequal length code of code number N shown by (11) and 0→formula.

N-<e>Qo) N-ku[〉01) N-<-! ->◇→ For example, in the case of the second code conversion characteristic, the prediction error signal of e---3 becomes N--1 from equation (11) and is converted into an unequal length code of "11".

The inverse code conversion characteristics of the unequal length decoding circuit 17 in FIG. 4 are the same as those in FIG. 1, and are (5), (6), and (7).
It is shown by the formula.

Referring to FIG. 8, a predictive encoding device 3 and a predictive decoding device 14 according to a third embodiment of the present invention are shown. In this embodiment, as a preprocessing circuit of the predictive encoding device 3, the preprocessing circuit performs thinning control (26) on the dinotalized image signal according to the thinning characteristics selected by the control signal from the control circuit 11. A thinning control circuit 50 is used that can perform the following operations. The thinning process may be performed with equal constraints. Therefore, first, the thinning control circuit 50' (the first
The first method is to actually perform thinning to reduce the number of samples using the circuit shown in Figure 0), and then perform predictive encoding using a predictive encoder. The second method is to give that "jf, 1 to the predictive encoder, and then actually perform thinning in an unequal length encoding circuit and perform code conversion. Interpolate the signal from the signal of the surrounding pixels that should not be thinned out,
A third method can be considered in which an unequal length encoding circuit actually performs thinning and also performs code conversion. This embodiment employs the third method.

The image signal input to terminal 1 is processed by A/b converter 2 at sampling frequency f8 (fs=3
decimation control circuit 5 which converts the sampled signal into a 5-bit PCM signal (fsc) and sends it to the 2-decimation control circuit 50.
0 dimensions, pixels to be thinned out and pixels not to be thinned out are determined according to thinning characteristics selected by control signals, and signal values of pixels to be thinned out are interpolated in advance using signals of pixels that should not be thinned out. ing.

The image signal output from the thinning control circuit 50 is as follows.

The signal is input to the subtracter 7 of the predictive encoder 5 and the predictor 107 . The subtracter 7 subtracts the prediction signal output from the predictor 107 from the image signal output from the one-thinning control circuit 50, and outputs a prediction error signal. The prediction error signal is input to the unequal length encoding circuit 51 of the unequal length encoder 8.

The unequal length encoding circuit 51 follows a control signal from the control circuit 11.

Only the prediction error signals corresponding to pixels that should not be thinned out are converted into unequal length codes according to the code conversion characteristics, and the control information necessary for decoding (information on thinning control signal No. 1, etc.)
It is also sent to the buffer memory 10.

The buffer memory 10 temporarily stores the information sent from the unequal length encoding circuit 51, converts the speed to match the transmission speed of the transmission line, and sends it to the output terminal 12'' (Niji transmission line). The control circuit 11 is informed of the amount of information stored in the. The control circuit 11 determines whether to switch the thinning characteristics at appropriate intervals based on the amount of information accumulated from the buffer memory 10.
A control signal for switching the zero thinning characteristic and the code conversion characteristic of the unequal length encoding circuit 51 is output. The control circuit 11 performs control such that as the amount of information storage increases, the number of samples to be thinned out increases, and when the amount of information storage is small, no thinning is performed.

The above is an explanation of the operation of the predictive encoding device 3.

In the predictive decoding device 14, the information sent from the transmission line is sent from the input terminal 13 to the four-way memory 16 of the unequal length decoder 15, and is temporarily stored therein. This stored information is sequentially read out in accordance with requests from the unequal length decoding circuit 52 of the unequal length decoder 15. Unequal length decoding circuit 5
Sent to 2.

The unequal length decoding circuit 52 separates the information on the control signal for 2 decimation from the information on the unequal length code, and sends a control signal for switching the characteristics of the 9-separation decimation (29) to the interpolation processing circuit 53. The unequal length decoding circuit 52 has an inverse code conversion characteristic corresponding to the code conversion characteristic of the unequal length encoding circuit 51, and obtains two separate unequal length code strings. and,
The unequal length decoding circuit 52 is.

The obtained unequal-length code is subjected to inverse code conversion at the time corresponding to the pixel that has not been thinned out according to the inverse code conversion characteristic selected by the 2 minutes * 11 shi control signal, and a prediction error signal is output. do. A prediction error signal having an appropriate value of 9, for example a value of 0, is output at a time corresponding to the pixel that has been thinned out. The obtained prediction error signal is sent to the prediction decoder 2
The signal is sent to the adder 20 of No. 4, and is added to the prediction signal sent from the predictor 41 to become a decoded signal. The decoded signal is sent to the interpolation processing circuit 53. The interpolation processing circuit 53.

Since a correct decoded signal is not obtained for the thinned out pixels, adaptive interpolation is performed using the signals of the unthinned pixels according to the interpolation characteristics selected by the control signal from the control circuit 18. Do the following. The decoded signal that has undergone interpolation processing is supplied to a D/A converter (30) 22 and a predictor 41. D/A converter 22
outputs an analog decoded signal to terminal 23.

The predictor 41 outputs a predicted signal from the decoded signal according to the prediction function P(Z) from the decoded signal and sends it to the adder 20 .

The above is an explanation of the operation of the predictive decoding device 14.

Predictor 10 in this third embodiment (FIG. 8)
For specific circuit examples 7 and 41, the predictor shown in FIG. 3 is used. Therefore, since the coefficients of the prediction function are integers, the lJf output side of the predictors 07 and 41 is not provided with a circuit for quantizing the prediction signal into integers. !
Example of f, d, unequal length encoding same size or building 2 (Figure 4)
The first code conversion characteristic and the first inverse code conversion characteristic described in .

FIG. 9 shows a thinning control circuit 5 according to a third embodiment of the present invention.
FIG. 6 is a diagram showing the spatial arrangement of sampled pixels to explain the thinning characteristics at zero. Since the sampling frequency f8 is selected to be three times the subcarrier frequency (f8-(31)3fSC), the Sansol number nH in one horizontal scanning line is n1l-682.5. The arrangement of pixels sampled from a portion of the screen from the (t-3)th line to the Lth line of the J field is as shown by the ◯ marks in FIG. 9(a). FIG. 9(b) is.

FIG. 3 is a diagram showing pixels to be thinned out using a first thinning characteristic. The X mark indicates the pixel to be thinned out.

In the horizontal direction, thinning is performed every 3 zansol.

Thinning is performed every other line in the vertical direction.

The effective Sansol number is reduced to 5A. The pixels marked with X that are thinned out are shifted by one sampling period every two lines that are thinned out. FIG. 9(c) is a diagram showing pixels to be thinned out using the second thinning characteristic.

All lines are thinned out every 3 samples in the horizontal direction, and the number of effective samples is reduced to 2/3.

Interpolation of signals of pixels to be thinned out is performed as shown in FIG. 9(c). The interpolation of pixel
r 1) + e + d and e respectively (:3
2) 0.5, 0.25, -0.5, 0.
The value obtained by weighting the signals by 5 and 0.25 and adding them together becomes the signal of pixel X. , if this interpolation is expressed by the interpolation filter characteristic H(Z) of the Z function, it is expressed as Equation 03.

H(Z) = 0.5 Z-” + 0.5 Z-681
-Q', 5 Z-682+ 0.25 Z-684+0
．． 252""" (11 FIG. 10 is a specific circuit example of the thinning control circuit 50' that can actually perform thinning. The image signal input to the thinning control circuit 50' is transferred to the switching circuit 62. terminal 6 of
3 and the interpolation filter circuit 6I. The interpolation filter circuit 61 is composed of a digital filter having interpolation filter characteristics expressed by equation 03, and outputs an interpolation signal. The interpolated signal is sent to terminal 64 of switching circuit 62. The switching circuit 62 uses a control signal sent from the control circuit 11 to switch between the non-thinning characteristic (the characteristic shown in FIG. 7(a)), the first thinning characteristic (the characteristic shown in FIG. 9(b)), and the second thinning characteristic. One of the thinning characteristics (characteristics shown in FIG. 9(c)) is selected. Then, for the pixel (33) to which 2-decimation is performed according to this thinning-out characteristic, the switch 65 is connected to the terminal 64, and an interpolation signal is obtained. On the other hand, for pixels that are not thinned out by one, the switch 65 is connected to the terminal 63, and the original 11 pixel S1 signals that are not processed are output.

The interpolation processing circuit 53 of the predictive decoding device 14 in the third embodiment (FIG. 8) is similar to the thinning control circuit 50' in FIG.
Same as ': composed of sea urchins. When the prediction function has coefficients with values below the decimal point, quantization by truncation can be performed by inputting only integer values from the output of the adder 20 in FIG. 8 to the interpolation processing circuit 53.

FIG. 11 shows a specific example of a circuit configured by combining both the thinning control circuit 50 and the predictive encoder 5 in the third embodiment (FIG. 8) of the present invention. In this circuit example, the interpolation filter circuit 61 of the thinning control circuit 50' in FIG.
It is configured to be used also by the delay element of the second prediction circuit 43 of the predictor 107 shown in the figure.

An image signal is input from a terminal 70, a control signal is input from a terminal 78 (34), and a prediction error signal is output from a terminal 79. The switching circuit 62 has the same function as the switching circuit 62 in FIG. First prediction circuit 42, determination circuit 44
．． The switching circuit 45 and the register 46 are respectively connected to the first circuit in FIG.
prediction circuit 422 determination circuit 44. It has the same function as the switching circuit 45 and the register 46. Subtractor 7 has the same function as subtracter 7 in FIG. The second prediction circuit 43 is composed of a shift reno star with a tano sensor, and has output terminals 431 and 43.
2, 433, 4.34 and 435 respectively have 680 + 681 + 68 for the input signal of the shift register.
A signal delayed by the period of the sampling clock of 3.1364 and J365 is output. Multipliers 73, 74, 7
5, 76 and 77 are 05°0.5 and -0.5 respectively
, with coefficients of 0.25 and 0.25.

Multiply each. The output signals of those multipliers are sent to the adder 7
After being sent to the register 71 and added, it is delayed by one sampling clock cycle. An interpolated signal is obtained at the output of this Rhenostaph 1. That is.

The input signal of the second prediction circuit 43 and the (35
) The relationship with the output signal is determined based on the interpolation filter characteristics shown in equation (9).

Interpolation processing circuit 53 in predictive decoding device 14 in FIG.
and the predictor 41 can be similarly configured to share a delay element.

Referring to FIG. 12, a predictive encoding device 3 and a predictive decoding device 14 according to an eleventh embodiment of the present invention are shown. In this embodiment, a combination of a quantization circuit 4, a thinning control circuit 50, and a band limiting circuit 80 is used as a preprocessing circuit.

The image signal input to terminal 1 is converted to A/converter 2 at a sampling frequency f which is three times the subcarrier frequency.

(fs = 3 fsc), converted into a 5-bit PcM signal, and sent to the band limiting circuit 80.

The band limiting circuit 80 can band limit at least one of the spatial frequency and the frequency in the time axis direction of the digitized image signal according to the band limiting characteristic selected by the control signal from the control circuit 82.

Band-limiting characteristics can also be determined to remove noise (36) sound components in the image signal. The image signal subjected to band limitation by the band limitation circuit 80 is converted into a control signal from the control circuit 82 by the quantization circuit 4.
: is quantized according to the selected quantization characteristic. The image signal quantized by the quantization circuit 4 is sent to a 2-decimation control circuit 50.

The thinning control circuit 50 performs interpolation processing on the pixels to be thinned out by two according to the thinning characteristics selected by the control signal from the control circuit 82. The image signal that has been interpolated by the thinning control circuit 50 is sent to the predictive encoder 5, and the predictive encoder 5 outputs a prediction error signal. The prediction error signal is sent to an unequal length encoding circuit 81 of the unequal length encoder 8. The unequal length encoding circuit 81 has code conversion characteristics corresponding to the quantization characteristics, and only generates prediction error signals corresponding to pixels that should not be thinned out by 1 according to the code conversion characteristics selected by the control signal from the control circuit 82. Convert to unequal length code. The unequal length code information is sent to the buffer memory 10 together with the control information necessary for decoding, and is temporarily stored in the buffer memory 10. Bano (37) The buffer memory 10 smoothes the information and sends it to the transmission path from the output terminal 12.
The control circuit 82 is informed of the amount of information stored in 0. The control circuit 82 determines whether to switch between the band limit characteristic, the quantization characteristic, and the thinning characteristic based on the amount of information accumulated from the buffer memory 10 at appropriate intervals. A control signal for switching the code conversion characteristic of the equal-length encoding circuit 81 is output.

The above is an explanation of the operation of the predictive encoding device 3.

In the predictive decoding device 14, the information sent through the transmission path is sent to the buffer memory 16 of the unequal length decoder 15 and temporarily stored. This stored information is sequentially read out and sent to the unequal length decoding circuit 83 in accordance with requests from the unequal length decoding circuit 83 of the unequal length decoder 15. The unequal length decoding circuit 83 separates control signal information and unequal length code information, and quantizes the separated control signal information by switching between quantization characteristics, thinning characteristics, and inverse code conversion characteristics. It is sent to the circuit 40 and the interpolation processing circuit 53. Unequal length (38) The decoding circuit 83 has an inverse code conversion characteristic corresponding to the code conversion characteristic selected by the unequal length encoding circuit 81 of the predictive encoding device 3, and is selected by the control signal separated into two. The unequal-length codes separated into two are converted into a prediction error signal according to the inverse code conversion characteristics. At this time.

The prediction error signal for the thinned out pixels is an appropriate A value.

For example 0. is interpolated. The prediction error signal is sent to the adder 20 of the prediction decoder 24 and added to the prediction signal from the quantization circuit 40 to become a decoded signal.

The decoded signal is sent to an interpolation processing circuit 53. The interpolation processing circuit 53 adaptively performs interpolation on the pixels that have been decimated by 2 according to the interpolation characteristics selected by the control signal using the signals of the pixels that have not been decimated and are input to the predictive encoder 5. outputs a decoded signal equal to the received signal.

The decoded signal subjected to interpolation processing is sent to the D/A converter 22 and the predictor 41. The predictor 41 obtains a prediction signal from the decoded signal according to the prediction characteristics and supplies it to the quantization circuit 40 . The quantization circuit 40 quantizes the predicted signal according to the quantization characteristic selected by the control signal and outputs the quantized (three) predicted signals. The D/A converter 22 outputs an analog decoded signal to an output terminal 23.

The above is an explanation of the operation of the predictive decoding device 14.

In this embodiment, the preprocessing circuit is a combination of the band limiting circuit 80, the quantization circuit 4, and the thinning control circuit 50, so that the preprocessing circuit is This allows for precise control.

Encoding can be performed without visually noticeable deterioration in image quality. As for the fine-grained and shuffled control that takes into account the above-mentioned visual characteristics, 2. For example, band limiting or thinning is performed relatively preferentially in flat image parts containing low-frequency components, and in parts containing many high-frequency components. Restriction by quantization is performed relatively preferentially.

Control that restricts information in an overall well-balanced manner is conceivable.

FIG. 13 shows the band limiting circuit 8 of the fourth embodiment (FIG. 12).
0 is a specific example of a circuit. This band limiting circuit 80 is
It limits the spatial frequency band, and is configured as a product of a horizontal band-limiting filter and a vertical band-limiting filter. The image signal input to the input (io) terminal 84 is passed through the bandpass filter A.
87 and a subtracter 89 . A control signal from the control circuit 82 input to the input terminal 85 is supplied to attenuation circuits 88 and 91. The band pass filter A87 is (1Φ
It is composed of a digital filter represented by the function kA field of the equation, and has filter characteristics that allow a frequency band in the horizontal direction to pass.

H, (Z)=1-(0,52"-1-Z"-0,5Z-
') (1→The bandpass signal output from the bandpass filter A87 is sent to the attenuation circuit 88. The attenuation level of the attenuation circuit 88 is controlled by the control signal from the control circuit 82, kA (0≦kA ≦1) Output a bandpass signal twice as large as k output from the attenuation circuit 88.
The A-times bandpass signal is supplied to a subtracter 89 . The subtracter 89 subtracts the kA times the bandpass signal from the input image signal of the terminal 84, and outputs a horizontally band-limited signal. The outputs of the eight subtracters are supplied to a bandpass filter B90 and a subtracter 92. Bandpass filter B90 is 0
It is composed of a digital filter shown by the function HB□□□) of formula 0.

(41) It has a filter characteristic that allows the frequency band in the vertical direction to pass.

■B(z)-1Z-2nn O, 1 However L
n and □ are the Zantzor numbers of one line, and f8 = 3. f8
C(7) jQ combination is n, , = 682.5. The bandpass signal output from the bandpass filter B90 is supplied to an attenuation circuit 91. The attenuation circuit 91 outputs a bandpass signal whose attenuation is controlled by a control signal from the control circuit 82 and whose magnitude is I kB (0<kR<1.). 1 (□
The multiplied bandpass signal is provided to a subtracter 92. A subtracter 92 subtracts 1<,
, and the vertical bandpass signal is subtracted, and a horizontally and vertically band-limited signal is output at an output terminal 786. The filter function I-T'(Z) representing the band-limiting characteristic of the band-limiting circuit 80 is expressed by equation 04.

n'(z)=(1-kA(1-0,5Z-1-Z-'
-1-(,),5Z-4))X (1-to,,(1z-
4365) l (l, SkA and l<n
When the amount of stored information is large, a value of 1- or close to 1 is selected, and when the amount of stored information is small (42), a value of 0 or close to O is selected. When kA and kB are both 0, H'(Z) in the 0→formula becomes 1, and the input image is output unchanged. When kA and kB both approach 1, only frequency components near frequencies of 0 and 1/'sc and near integral multiples of 7H (t1□ is the horizontal scanning frequency) are passed.

As explained above and more clearly, according to this invention,
By providing pre-processing circuits such as band limiting circuits, quantization circuits, and thinning control circuits, and controlling them adaptively,
It is possible to provide a predictive decoding device that can receive output information from a non-recursive type predictive encoding device that enables real-time encoding and has an easy circuit configuration, and can obtain a decoded signal.

This is because the non-recursive type predictive encoding device and predictive decoding device can decode the same signal that is input to the predictive encoder.

If the predictive decoding device of the present invention is used, basically information-preserving encoding/decoding can be performed when the image information is less than the transmission bit rate.

Note that the quantization characteristics and configuration of the quantization circuits 4 and 40 are as follows:
It is not limited to what is shown in FIG. Predictor 6
, 2], 4.1, and the configuration of 107 are not limited to those shown in FIGS. 3 and 5. The code conversion characteristics, inverse code conversion characteristics, and unequal length codes are not limited to those shown in the first embodiment or the second embodiment.

The thinning characteristics of the thinning control circuit 50 are often limited to the characteristics shown in FIG. And thinning control circuit 50'
The interpolation processing circuit 53 is not limited to that shown in FIG. 10, and the filter characteristics of the interpolation filter circuit 61 are not limited to the function shown in equation 01. The circuit configured by combining the thinning control circuit 50 and the predictive encoder 5 is the 11th
The scope is limited to that shown in the figure. The band limiting circuit 80 is.

It is not limited to what is shown in FIG. The unequal length code with code conversion characteristics used in the unequal length encoding circuit 9 is as follows:
Instead of using one type of fixed unequal length code, two different types of unequal length codes may be used while being adaptively switched. It's a size.

In the first to fourth embodiments, the nine image signals are NTSC color TV signals, but they are not limited to NTSC signals, and may be, for example, PAC signals.

Furthermore, the sampling frequency is not limited to three times the sub-gear frequency.

Further, the control circuit that outputs the control signal to the preprocessing circuit may determine the control signal to be given to the preprocessing circuit based on the amount of information input to the graphic memory 10. That is, the cumulative amount of information input to the buffer memory 10 in a certain section (buffer memo IJ 1. O
The control signal to be given to the preprocessing circuit may be determined depending on whether the amount of information input to the preprocessing circuit increases rapidly or gradually.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of a specific configuration of the quantization circuit 4 shown in FIG. 1, and FIG. 3 is a circuit diagram showing an example of a specific configuration of a predictor 6. FIG. FIG. 4 is a block diagram showing the configuration of a second embodiment of the present invention, FIG. 5 is a circuit diagram showing an example of a specific configuration of the predictor 107 shown in FIG. 4, and FIG. (45) A circuit diagram showing an example of a specific configuration of the first prediction circuit 42 and the second prediction circuit 43, FIGS. 7(a) and 7(b) are the predictive decoder 24 of FIG. FIG. 8 is a block diagram showing the configuration of the third embodiment of the present invention, and FIGS. 9(a), (b), and (c) are diagrams showing thinning characteristics, respectively. , FIG. 10 is a circuit diagram showing the thinning control circuit 50', and FIG. 11 is a circuit diagram showing the thinning control circuit 50'.
FIG. 12 is a block diagram showing the configuration of a fourth embodiment of the present invention, and FIG. FIG. 2 is a circuit diagram showing an example of a specific configuration of a band limiting circuit 80 of FIG. 4 is a quantization circuit as a preprocessing circuit; 50 and 50' are thinning control circuits as preprocessing circuits; 80 is a band limiting circuit as a preprocessing circuit; 5 is a predictive encoder; 9, 10
8, 51, and 81 are unequal length encoding circuits, 10 is a first buffer memory, 11 and 82 are control circuits, and 16 is a second buffer memory. 17. 52 and 83 are unequal length decoding circuits, 19 and 24
is a predictive decoder. (46) ((1) ρ−3−−−o. ρ−2−−−o. fl−1−−−o. ρ −1 ~−〇〇(b) D−3−−−o. ρ−2−−−−x . ρ−/−−−o. β −−−−ox ρ−2−−−−XO fl−1−−−ox R−−−−o y. Fig. 9 o x o o x---o
x o o x---o
× 0 0 × ~ --L x Introduction Figure 10

Claims (1)

[Claims] 1. Control the amount of information of the digitized image signal in accordance with a control signal determined based on the amount of information input to the first buffer memory or the amount of information stored in the first buffer memory, and A prediction error signal is obtained by predictively encoding an image signal that has been subjected to quantity control, and unequal length encoding is performed on the prediction error signal to obtain unequal length code information, and the first buffer memory stores the unequal length code. A predictive decoding device that uses the above output information as input information in a predictive coding device that temporarily stores information and control information necessary for decoding, smooths it, and sends it out as output information, wherein the above input information is temporarily stored. A second buffer memory that converts the speed and outputs it sequentially; separates the unequal length code information and the control information from the information output from the second buffer memory; and separates the unequal length code information from the an unequal length decoding circuit for converting into a prediction error signal; and receiving the prediction error signal and the control information output from the unequal length decoding circuit, and predictively decoding the prediction error signal according to the control information. A predictive decoding device comprising: a predictive decoder that outputs the digitized image signal.