JPS5854734U - Initialization circuit - Google Patents
Initialization circuitInfo
- Publication number
- JPS5854734U JPS5854734U JP14918681U JP14918681U JPS5854734U JP S5854734 U JPS5854734 U JP S5854734U JP 14918681 U JP14918681 U JP 14918681U JP 14918681 U JP14918681 U JP 14918681U JP S5854734 U JPS5854734 U JP S5854734U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power supply
- processing unit
- central processing
- charging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007599 discharging Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、従来例を示す構成説明図、第２図はその動作
説明用波形図、第３図は、この考案の一実施例を示す構
成説明図ζ第４図はその動作説明用波形図である。
１・・・・・・充放電回路、２・・・・・・セット回路
、３・・・・・・中央処理装置、４・・・・・・コンパ
レータ、５・・・・・・リセット回路、”Ｄ・・・・・
・装置電源、ＶＢ・・・・・・バックアップ電源。Fig. 1 is an explanatory diagram of the configuration showing a conventional example, Fig. 2 is a waveform diagram for explaining its operation, and Fig. 3 is an explanatory diagram of its configuration showing an embodiment of the invention.Fig. 4 is a waveform diagram for explaining its operation. It is a diagram. 1... Charge/discharge circuit, 2... Set circuit, 3... Central processing unit, 4... Comparator, 5... Reset circuit ,”D...
・Device power supply, VB...Backup power supply.
Claims (1)
の電圧が所定の電圧値以上になったときセット信号を発
生するセット回路と、このセット回路のセット信号によ
りセットされる中央処理装置と、前記装置電源がバック
アップ電源により定められた所定の基準電圧値以下にな
ったとき前記放電回路を放電させ、前記セット回路を通
じて前記中央処理装置をリセットするリセット回路とを
備えたことを特徴とするイニシャライズ回路。A charging and discharging circuit to which power is supplied, a set circuit that generates a set signal when the voltage of this charging and discharging circuit exceeds a predetermined voltage value, and a central processing unit that is set by the set signal of this set circuit. and a reset circuit that discharges the discharge circuit and resets the central processing unit through the set circuit when the device power supply becomes lower than a predetermined reference voltage value determined by a backup power supply. initialization circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14918681U JPS5854734U (en) | 1981-10-06 | 1981-10-06 | Initialization circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14918681U JPS5854734U (en) | 1981-10-06 | 1981-10-06 | Initialization circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5854734U true JPS5854734U (en) | 1983-04-14 |
Family
ID=29941969
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14918681U Pending JPS5854734U (en) | 1981-10-06 | 1981-10-06 | Initialization circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5854734U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53106524A (en) * | 1977-03-01 | 1978-09-16 | Toshiba Corp | Initial clear unit for digital circuit |
-
1981
- 1981-10-06 JP JP14918681U patent/JPS5854734U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53106524A (en) * | 1977-03-01 | 1978-09-16 | Toshiba Corp | Initial clear unit for digital circuit |
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