JPS5856545A - Eliminating circuit for polarized wave interference - Google Patents

Eliminating circuit for polarized wave interference

Info

Publication number
JPS5856545A
JPS5856545A JP56153971A JP15397181A JPS5856545A JP S5856545 A JPS5856545 A JP S5856545A JP 56153971 A JP56153971 A JP 56153971A JP 15397181 A JP15397181 A JP 15397181A JP S5856545 A JPS5856545 A JP S5856545A
Authority
JP
Japan
Prior art keywords
signal
output
interference
received signal
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56153971A
Other languages
Japanese (ja)
Other versions
JPS6239861B2 (en
Inventor
Junji Namiki
並木 淳治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56153971A priority Critical patent/JPS5856545A/en
Priority to US06/416,112 priority patent/US4479258A/en
Publication of JPS5856545A publication Critical patent/JPS5856545A/en
Publication of JPS6239861B2 publication Critical patent/JPS6239861B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/002Reducing depolarization effects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/02Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06Demodulator circuits; Receiver circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To speed up the control, by controlling the compensation coefficient through the change of combinations of addition and subtraction of the real and imaginary parts of a discrimination error signal in response to a quadrant where the signal exists, when the value of the real and imaginary parts of an interference polarized wave reception signal is equal. CONSTITUTION:Horizontal and vertical polarized wave reception signals HO and VO are inputted to a polarized wave interference subtraction circuit 6 and the signal VO is inputted to an interference discriminator 3''. A compensation coefficient OMEGA is multiplied with the signal VO at the circuit 6, and the result is summed up with the signal HO to output an interference wave eliminating signal He. The signal He is inputted to a discrimination error detector 1 to output a discrimination error signal (e) from a detector 1. The real and imaginary parts eR and eI of the signal (e) are respectively inputted to correlation devices 2-2''' to calculate eR+eI and eR-eI and each correlation device outputs a signal corresponding to each quadrant to a switch 4'. The discriminator 3'' detects that the absolute value of the real and imaginary parts of the signal VO is equal and gives a control signal to select the output of the correlation devices 2-2''' depending to which quadrand the signal belongs, to a switch 4 and gives the signal selected at the switch 4 to the circuit 6 via an LPF 5 as the coefficient OMEGA.

Description

【発明の詳細な説明】 この発明は、無線伝送の直交偏波共用にともない生じる
交差偏波干渉補償技術忙関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to cross-polarization interference compensation technology that occurs due to orthogonal polarization sharing in wireless transmission.

マイクロ波帯の無−通信は地上通信並びに衛星通信を中
心に急速に発展している。無線通信の需要は今後移動通
信サービスの拡大等の理由で更に増大していくことが予
想され、準ミリ波以上の周波数帯開拓と共に、実用的価
値の高い現用の周波数帯のいわゆる周波数再利用の考え
が高まっている。すてにCCIR(国際無線通信諮問委
員会)の4〜6GH2のFM無線周波数配置に関する勧
告には、直交偏波を使用することが明記されている。
Wireless communications in the microwave band are rapidly developing, centering on terrestrial communications and satellite communications. The demand for wireless communications is expected to further increase in the future due to the expansion of mobile communication services, etc., and along with the development of sub-millimeter wave and higher frequency bands, so-called frequency reuse of current frequency bands with high practical value is expected. Thoughts are growing. The CCIR (Consultative Committee on International Radiocommunications) recommendations regarding FM radio frequency allocation from 4 to 6 GH2 clearly specify the use of orthogonal polarization.

また、衛星通イ=においてもIN置5AT(国際電気通
信衛星機構)は、V傍系衛星で単一偏波で用いられてき
た4〜6GH,帯での直交偏波共用技術を実用化する模
様である。
In addition, in satellite communications, IN-5AT (International Telecommunication Satellite Organization) is expected to commercialize technology for sharing orthogonal polarization in the 4 to 6 GH band, which has been used with single polarization on V related satellites. It is.

本来、自由空間は直交する2偏皮に対して独立で、両偏
波を同時に伝送できる伝送線路であるが、実際の伝搬路
には降雨をどの媒質の異方性が存在し、直交偏波共用方
式を採用すると、交差偏波の発生による偏波間の結合が
異偏波チャンネル干渉を起すことになる。
Originally, free space is independent of two orthogonal polarizations, and is a transmission line that can simultaneously transmit both polarized waves. However, in actual propagation paths, it is difficult to determine which medium has anisotropy to transmit rainfall, and whether the orthogonal polarization If a shared system is adopted, coupling between polarized waves due to the generation of cross-polarized waves will cause interference between channels of different polarizations.

これら直交偏波共用化の達成には、アンテナや給電装置
などの偏波特性の改善と共に降雨などによる電波伝搬上
の偏波特性の劣化を補償する交差偏波補償回路の開発も
重要な課題となっている。
In order to achieve this shared use of orthogonal polarization, it is important to improve the polarization characteristics of antennas and power supply equipment, as well as develop cross-polarization compensation circuits that compensate for deterioration of polarization characteristics during radio wave propagation due to rain, etc. It has become a challenge.

交差偏波補償技術は、かかる偏波間の結合をアンテナ給
電装置や無線機器内に補償回路を設けて自動的な補償を
行なうものである。
Cross polarization compensation technology automatically compensates for such coupling between polarized waves by providing a compensation circuit within an antenna feeder or wireless device.

従来、マイクロ波帯通信はFMを中心とするアナログ伝
送が中心であったが近年、マイクロ波帯においても、デ
ィジタル伝送が使用される様になり交差偏波補償方式に
ついてもディジタル伝送の特徴を生かしたより効率の良
い方式の提案が要請されている。
Conventionally, microwave band communication has centered on analog transmission, mainly FM, but in recent years, digital transmission has come to be used in the microwave band as well, and the cross-polarization compensation method has also been developed to take advantage of the characteristics of digital transmission. Proposals for more efficient methods are requested.

従来、この種の回路は、相互に直交する2つの偏波を受
信し、一方(干渉@)の受信信号に補償係数を乗じて他
方(受信希望1111 )の受信信号から減することに
よって干渉成分を除去するようにしている。例えば、水
平偏波と垂面偏波とを考え、各々に独立なデータH,V
を乗せると、伝播中に生じた偏波干渉αV、βHにより
、水平偏波の受信信号ルおよび季直偏阪の受信信号V@
は、Ho二H+αV     ・・・・・・・・・・・
・・・・・・・(1)■・=V+βH・−・・・・・・
・・・−・・・−・・・(2)となる。今、データHを
受信したい場合を考えると、垂直偏波の受信信号va 
K ’mi慣係数Ωをを乗じて水平受信信号烏に加えて
干渉除去信号H・を得るようにするのが一般的である。
Conventionally, this type of circuit receives two mutually orthogonal polarized waves, multiplies the received signal of one (interference @) by a compensation coefficient, and subtracts it from the received signal of the other (desired reception 1111) to remove the interference component. I am trying to remove it. For example, considering horizontal polarization and vertical polarization, each has independent data H and V.
, the horizontally polarized received signal and the seasonal polarized received signal V@
is Ho2H+αV・・・・・・・・・・・・
・・・・・・・・・(1) ■・=V+βH・−・・・・・・・
...-...-...(2). Now, if we consider the case where we want to receive data H, the vertically polarized received signal va
It is common to multiply K'mi by the inertia coefficient Ω and add it to the horizontal received signal to obtain an interference cancellation signal H.

すなわち、He = Ha+ΩVo      ・・・
・・・・・・・・・・・・・・・・・・(3)従って、 He=H+αV十Ω(V+βH) =H+(α+Ω)V+Ω・β・H キH+−(α+Ω)V   ・・・・・・・・・・・・
・・・・・・・(4)すなわち、α=−Ωとすることに
よってHe:H・・・・・・・・・・・・・−・・・・
・・・(5)となり、偏波干渉が除去される。このとき
Ωの制御は、一般に Ω向1)−Ω” −kV@ ・(He −’Ae )−
−= (6)となるように制御される。ここに9・はH
・の識別値であり、He−介eは識別誤差eであって垂
直偏波からの干渉が含まれている。従って8と7番との
相関を最小化する方向にΩを制御すれば、α=−Ωとな
り、干渉が除去されることになる。
That is, He = Ha + ΩVo...
...・・・・・・・・・・・・
・・・・・・・・・(4) That is, by setting α=−Ω, He:H・・・・・・・・・・・・・・・・
...(5), and polarization interference is removed. At this time, the control of Ω is generally performed in the Ω direction1)-Ω"-kV@ ・(He-'Ae)-
−= (6). Here 9. is H
is the identification value of . . , and He−e is the identification error e, which includes interference from vertical polarization. Therefore, if Ω is controlled in a direction that minimizes the correlation between numbers 8 and 7, α=−Ω, and interference will be removed.

しかし、■−・・ は複素乗算であって、高価なアナロ
グ乗算器を必要とし、特に伝送レートが高速の場合は非
常に高価である。
However, -... is a complex multiplication and requires an expensive analog multiplier, which is very expensive especially when the transmission rate is high.

本発明の目的は、上述の従来の入力を解決し、複素乗算
器を使用しないで、上記■♂・eに比例する値を得るこ
とができる安価な偏波干渉除去回路を提供することにあ
る。
An object of the present invention is to provide an inexpensive polarization interference cancellation circuit that can solve the above-mentioned conventional input problem and obtain a value proportional to the above-mentioned ■♂・e without using a complex multiplier. .

本発明の干渉除去回路は、相互に直交する2つの偏波を
受信し、一方の受信信号に補償係数を乗じて他方の受信
信号に加えることにより偏波干渉成分を除去する偏波干
渉除去回路において、補償後の受信信号とその識別イ1
との誤差を検出する識別誤差検出器と、該誤差検出器の
出力する識別誤差信号の実数部と虚数部との和および差
を出力する加算器および減算器と、干渉偏波側受信信号
の実数部と虚数部の絶体値が等しいことを検出しかつど
の象限に属するかに従って制御信号を出す干渉側識別器
と、該干渉9JA識別器の出力する制御信号に対応して
前記加算器と減算器の出力信号の符号組合せを変えて出
力する開閉器と、該開閉器の出力を平滑する低域P波器
とを備えて、該低域p波器の出力により前記補償係数を
得るようにしたことを特徴とする。
The interference cancellation circuit of the present invention receives two mutually orthogonal polarized waves, multiplies one received signal by a compensation coefficient, and adds it to the other received signal to remove the polarization interference component. , the received signal after compensation and its identification number 1
an adder and a subtracter that output the sum and difference between the real part and the imaginary part of the identification error signal output by the error detector; an interference side discriminator that detects that the absolute values of the real part and the imaginary part are equal and outputs a control signal according to which quadrant they belong to; and the adder in response to the control signal output from the interference 9JA discriminator. A switch that changes the sign combination of the output signal of the subtracter and outputs it, and a low-frequency P-wave device that smoothes the output of the switch, and the compensation coefficient is obtained by the output of the low-frequency P-wave device. It is characterized by the following.

次に、本発明について、図面を参照して詳細に説明する
Next, the present invention will be explained in detail with reference to the drawings.

先ず、本発明の沖理について説明する。今、受信信号■
。の実数部をVR、虚数部を■I、識別績差信号eの実
数部をeB 、虚数部を61とすると、Vo −VR+
 ノV!        ・・・・・・・・・・・・・
・・・・・・・ (7)6=el+ノ゛e1・・・・・
・・・・・・・・・・−・・・(8)であるから、 v:e ” (VB−)Vl ) (15R+7’@I
)−(VRe R+ VIe 1 ) 十 ノ’   (Vuet        VIeR)
である。ここで、 V鼠−Vx>0          ・・・・・・・・
・・・・・・・・・・・・・ (9)の時は、 Ve   eoc(sB+eH)  +)  (el 
  eB)・・・・・・・・・・・・・・・・・・・・
・a・となるから、上記α1式は加算器のみで求めるこ
とができる。従って、(9)式を満足する時にのみu(
1式の値を出力させ、これによって補償係数を制御する
ととKよシ干渉波成分を祿去することができる。
First, the principle of the present invention will be explained. Now, the received signal■
. Let VR be the real part of
No V!・・・・・・・・・・・・・・・
...... (7) 6=el+noe1...
・・・・・・・・・・・・・・・(8) Therefore, v:e ” (VB-)Vl ) (15R+7'@I
)-(VRe R+ VIe 1) 10' (Vuet VIeR)
It is. Here, V-Vx>0 ・・・・・・・・・
・・・・・・・・・・・・ When (9), Ve eoc(sB+eH) +) (el
eB)・・・・・・・・・・・・・・・・・・・・・
・a・ Therefore, the above α1 formula can be obtained using only an adder. Therefore, u(
By outputting the value of Equation 1 and controlling the compensation coefficient using this value, it is possible to eliminate the interference wave component by K.

例えば、第1図に示すよう′&16値振幅位相変lli
m(16QAM)の信号のうち、黒丸印の信号は(9)
式を満足している。
For example, as shown in FIG.
Among the m (16QAM) signals, the signal marked with a black circle is (9)
satisfies the formula.

第2図は、(9)式を満足するとき出力信号を出すよう
Kした干渉側識別器の一列を示す回路図である。すなわ
ち、端子300,301へは、干渉側受信信号の実数部
vRおよび虚数部vlがそれぞれ入力し、減算器31で
減算し、折返し回路32で差の絶体値を出力し、比較回
路33で比較するととKよりl Va l中lVt1が
検出される。vR〉0は比較器30で検出される。比較
器30と34の両出力はアンド回路34で論理積がとら
れて出力端子302に出力される。
FIG. 2 is a circuit diagram showing a row of interference side discriminators that output an output signal when formula (9) is satisfied. That is, the real part vR and imaginary part vl of the interfering side received signal are respectively input to the terminals 300 and 301, subtracted by the subtracter 31, outputted as the absolute value of the difference by the folding circuit 32, and outputted by the comparator circuit 33. In comparison, lVt1 in lVal is detected from K. vR>0 is detected by comparator 30. Both outputs of the comparators 30 and 34 are ANDed by an AND circuit 34 and output to an output terminal 302.

嬉3図は、上述の回路を使用した偏波干渉除去回路の一
例を示すブロック図である。すなわち、偏波干渉減算回
路6の入力端子600に例えば水平偏波受信信号Haを
入力させ、入力端子601には垂直偏波受信信号Vaを
入力させる。垂直偏波受信信号■・は乗算器61で補償
係数Ωが乗ぜられて加算器60において水平偏波受信信
号ルに加えられる。従って出力端子CO2には、干渉除
去信号H6が出力する。すなわち(3)式が実現される
。干渉除去信号HeFi、識別誤差検出器1の入力端子
100に接続され、識別器10によって識別値介。が出
力され、減算器11によって前記H,との差がとられて
識別誤差eが端子101から出力する。識別誤差eの実
数部@Rと虚数部e!は、相関器2の内蔵する加算器2
2によって加算され、減算器23によって減算される。
Figure 3 is a block diagram showing an example of a polarization interference removal circuit using the above-described circuit. That is, for example, the horizontally polarized received signal Ha is input to the input terminal 600 of the polarization interference subtraction circuit 6, and the vertically polarized received signal Va is inputted to the input terminal 601. The vertically polarized received signal (1) is multiplied by a compensation coefficient Ω in a multiplier 61 and added to the horizontally polarized received signal (1) in an adder 60. Therefore, the interference cancellation signal H6 is output to the output terminal CO2. In other words, equation (3) is realized. The interference canceled signal HeFi is connected to the input terminal 100 of the discrimination error detector 1 and is outputted via the discrimination value by the discriminator 10. is output, and the subtracter 11 takes the difference from the above-mentioned H, and the discrimination error e is output from the terminal 101. Real part @R and imaginary part e of identification error e! is the adder 2 built in the correlator 2
2 and subtracted by the subtracter 23.

加算器22の出力は、(11式右辺の(eB + el
 )を与え、減算器23の出力は(11式右辺の(e、
−el)を与えている。これらの出力は開閉器4(スイ
ッチ40.41)が閉じたときにそれぞれ積分器50お
よび51に供給され、(6)式に示した積分動作が行な
われ、平滑化される。
The output of the adder 22 is ((eB + el
), and the output of the subtractor 23 is ((e,
-el) is given. These outputs are supplied to integrators 50 and 51, respectively, when the switch 4 (switch 40, 41) is closed, and are subjected to the integration operation shown in equation (6) and smoothed.

開閉器4は干、歩測識別器3の出力によって閉じる開閉
器であり、干渉側識別器3は、前述の第2図に示すよう
K14成されていて、(9)式を満足するときのみ出力
を出す。従って、開閉器4は(9)式が満足されるとき
だ妙導通するから、このときの相関器2の出力は、顛式
によシ前記−41eに比例する。
The switch 4 is a switch that closes according to the output of the gait discriminator 3, and the interference side discriminator 3 has a K14 structure as shown in Fig. 2, and outputs only when formula (9) is satisfied. issue. Therefore, since the switch 4 is electrically conductive only when the formula (9) is satisfied, the output of the correlator 2 at this time is proportional to the above-mentioned -41e according to the formula.

加算器22の出力は積分器50によって平滑化されて補
償係数Ωの実数部Ω冨とされ、減算器23の出力性、積
分器51によって平滑化されて補償係数Ωの虚数部Ω■
とされる。積分器50 ; s 1で複素低板p波器5
会を構成している。すなわち、(6)式のΩを乗算器を
用いないで得ることができる。
The output of the adder 22 is smoothed by an integrator 50 to become the real part Ω of the compensation coefficient Ω, and the output of the subtracter 23 is smoothed by the integrator 51 to become the imaginary part Ω of the compensation coefficient Ω.
It is said that Integrator 50; complex low plate p-wave unit 5 with s1
The committee is comprised of members. That is, Ω in equation (6) can be obtained without using a multiplier.

上記補償係数Ωは前述の通シ乗算器61によって垂直偏
波受信信号ve K乗ぜられて水平偏波受信信号山に加
えることKより偏波干渉が打消される。
The compensation coefficient Ω is multiplied by the vertically polarized received signal ve K by the above-mentioned multiplier 61 and added to the peak of the horizontally polarized received signal, thereby canceling polarization interference.

補償残りは、識別誤差信号eとなって上述の動作によシ
次の補償係数を修正する。
The remaining compensation becomes the identification error signal e and corrects the next compensation coefficient by the above-described operation.

しかし、上述では、例えば第1図に示した16値振幅位
相変[(16QAM)の信号のうち、わずか2点しか利
用していないので制御スピードが遅い。制御スピードを
上げる為にはよシ多くの信号を利用する必要がある。そ
こで、本発明においては1Viz I = lVx I
を満足する信号点群をすべて利用することにより制御ス
ピードの上昇を図った。例えば16QAMの場合には、
第4図に・、ム、gig、マで示した8点(4組)を使
用する。・印の信号は前記(9)式を満足し、OI式右
辺によって入1eに比例した信号が得られることは前述
し九−印の信号は、実数が負で虚数が正であるから、 Vo’el (X: −(’ea  el)−) (@
m +”1)・・・・・・・・・・・・・・・・・・・
・・αυとなり、マ印の信号は、 −1oc −(@冨+61 )十ノ (e鼠−eり・・
・・・・・・・・・・・・・・・・・・・αりム印の信
号は Vo”e ” Cen  ew) + ) (el 6
1 )・・・・・・・・・・・・・・・・・・・・・I
となる。式01〜u3が成立する信号点群の検出は例え
ば第5図に示すような干渉gJA識別器によって行なう
ことができる。すなわち、例えば垂直偏波受信信号部の
実数部vRを端子300に入力させ、虚数部V!を端子
301に入力させる。正負比較器35゜36で実数部V
Rと虚数部v1の符号を判定し、その出力をアンド回路
39a〜39、dに入力させる。
However, in the above method, only two points of the 16-value amplitude phase shift signal (16QAM) shown in FIG. 1 are used, so the control speed is slow. In order to increase control speed, it is necessary to use many signals. Therefore, in the present invention, 1Viz I = lVx I
We aimed to increase the control speed by using all the signal points that satisfy the following. For example, in the case of 16QAM,
In Fig. 4, 8 points (4 sets) indicated by ・, mu, gig, and ma are used. It was mentioned earlier that the signal marked with ・ satisfies the above equation (9), and a signal proportional to input 1e can be obtained from the right side of the OI equation.In the signal marked with 9-, the real number is negative and the imaginary number is positive, so Vo 'el (X: -('ea el)-) (@
m +”1)・・・・・・・・・・・・・・・・・・
...αυ, and the signal marked with a mark is -1oc - (@Tomi+61) 10 (e-e-ri...
・・・・・・・・・・・・・・・・・・ α Rim mark signal is Vo”e” Cen ew) + ) (el 6
1)・・・・・・・・・・・・・・・・・・・・・I
becomes. Detection of a signal point group for which equations 01 to u3 hold can be performed, for example, by an interference gJA discriminator as shown in FIG. That is, for example, the real part vR of the vertically polarized received signal part is inputted to the terminal 300, and the imaginary part V! is input to the terminal 301. Real part V at positive/negative comparator 35°36
The signs of R and the imaginary part v1 are determined, and the output thereof is input to AND circuits 39a to 39, d.

アンド回路39mは、第1象限の信号に対してノ・イレ
ペルを出力し、アンド回路39b〜39dijそれぞれ
第2〜第4象限の信号に対してノ・イレベルを出力する
。一方実数部vR,虚数部v■を折返し回路37.38
に入力させ、それらの出力を減算器31に入力させて減
算する。減算器31の出力を折返し回路32を介して比
較器33によって一定レベルと比較し、IVRIキ!V
Xl を判定し、比較器33の出力はアンド回路34凰
〜34dの一方の入力とする。アンド回路34a〜34
dのもう一方の入力KH1それぞれ前記アンド回路39
1〜39dの出力が接続されている。従って、第4図に
・印で示した信号に対してはアンド回路34aがハイレ
ベルを出力し、アンド回路34b〜34dはそれぞれ■
印、マ印、ム印で示した信号に対してハイレベルを出力
する。従って、これらの出力を制御信号として、識別誤
差信号を組合わせることにより式(1(妙〜(1,1の
右辺を作成することができる。
The AND circuit 39m outputs a NO level for the signal in the first quadrant, and the AND circuits 39b to 39dij output a NO level for the signals in the second to fourth quadrants, respectively. On the other hand, the real part vR and the imaginary part v■ are folded back 37.38
and their outputs are input to the subtracter 31 and subtracted. The output of the subtracter 31 is compared with a constant level by a comparator 33 via a folding circuit 32, and the IVRI key! V
Xl is determined, and the output of the comparator 33 is used as one input of AND circuits 34-34d. AND circuits 34a to 34
The other input KH1 of d is connected to the AND circuit 39.
Outputs 1 to 39d are connected. Therefore, the AND circuit 34a outputs a high level for the signal indicated by the symbol * in FIG. 4, and the AND circuits 34b to 34d each output a high level.
Outputs high level for the signals indicated by marks, marks, and marks. Therefore, by using these outputs as control signals and combining the identification error signals, it is possible to create the right side of the equation (1(strange~(1,1).

第6図は、本発明の一実施例を示すブロック図である。FIG. 6 is a block diagram showing one embodiment of the present invention.

すなわち、水平偏波受信信号山は端子600に:入力さ
せ、垂直偏波受信信号VDは端子601.603を介し
て干渉側誠別器3′に入カバさせる。干渉側識別冊子は
第5図に示した構成であり、入力信号の条件に応じた制
御信号を出力して開閉器4′の開閉を制御する。
That is, the horizontally polarized received signal peak is inputted to the terminal 600, and the vertically polarized received signal VD is inputted to the interference side separator 3' via the terminals 601 and 603. The interference side identification booklet has the configuration shown in FIG. 5, and controls the opening and closing of the switch 4' by outputting a control signal according to the conditions of the input signal.

一方、垂直偏波受信信号Veは偏波干渉除去回路6内で
端子604から入力した補償係数Ωと乗ぜられたのち水
平偏波受信信号H9に加えられ、干渉波除去信号Heが
端子602から出力される。干渉波除去信号1(6ij
: #別誤差検出器1の端子100に入力させ、端子1
01から識別誤差信号Cが出力する。識別誤差信号eの
寿数部eBおよび虚数部e1はそれぞれ相関器2.Z、
2’、2”内において(eR+ ex )および(ei
t   6r)  が算出され、各相関器からはそれぞ
れ式0I−00右辺に相当する信号が出力する。開閉器
4′は前記干渉側識別器rの出力する制御信号に対応し
て上記各相関器の出力を択一的に選択して低域p波器5
の入力端子500に入力させる。低域p波器5は入力信
号を平滑化して出力端子501から補償係数Ωとして出
力する。
On the other hand, the vertically polarized received signal Ve is multiplied by the compensation coefficient Ω input from the terminal 604 in the polarization interference cancellation circuit 6, and then added to the horizontally polarized received signal H9, and the interference wave canceled signal He is outputted from the terminal 602. be done. Interference wave cancellation signal 1 (6ij
: Input to terminal 100 of #separate error detector 1,
The identification error signal C is output from 01. The lifetime part eB and the imaginary part e1 of the identification error signal e are respectively sent to the correlator 2. Z,
(eR+ ex ) and (ei
t 6r) is calculated, and each correlator outputs a signal corresponding to the right side of equation 0I-00. The switch 4' selectively selects the output of each of the correlators in response to the control signal output from the interference side discriminator r,
input to the input terminal 500 of. The low-pass p-wave generator 5 smoothes the input signal and outputs it from the output terminal 501 as a compensation coefficient Ω.

本実施例では、第4図に示した16個の信号中8個の信
号を係数Ωの制御に利用することができるため、迅速な
制御が可能である。すなわち、干渉偏波の変動がはげし
い場合にも応動することが可能であり、第3図の構成に
よる場合に比して約4倍の制御スピードが得られる。従
って、例えば衛星通信における宇宙空間のファラデー・
ローテーションによる偏波干渉変化にも迅速、精確に追
従することが可能である。
In this embodiment, 8 signals out of 16 signals shown in FIG. 4 can be used to control the coefficient Ω, so rapid control is possible. In other words, it is possible to react even when the interference polarization fluctuates rapidly, and a control speed approximately four times faster than in the configuration shown in FIG. 3 can be obtained. Therefore, for example, Faraday in space in satellite communications
It is also possible to quickly and accurately follow polarization interference changes due to rotation.

なお、上述では、相関器2 、2’ 、!、2′内にお
いてそれぞれ加算器と減算器′ft設けて、各相関器内
で式鱒〜u3の右辺を求めたが、例えば相関器202個
の出力(昨+ el )および(eB  el)を開閉
器4′内において制御信号に応じて加算又は減算するよ
うに構成すれば相関器z、!、γは省略することができ
る。
Note that in the above description, correlators 2, 2', ! , 2' were provided with an adder and a subtracter 'ft, respectively, and the right side of equation u3 was found in each correlator. If the switch 4' is configured to add or subtract according to the control signal, the correlator z,! , γ can be omitted.

以上のように、本発明においては、識別誤差信号の実数
部と虚数部とを加算する加算器と、減算する減算器を設
けて、干渉偏波受信信号の実数部と虚数部の大きさが等
しいとき、その属する象限に対応して前記7J[] X
器および減算器の出力組合せを変化させることより補償
係数を制御するように構成したから、補償係数制御に利
用できる信号点数が多くなり迅速な制御スピードを得る
ことができる。゛また、乗算器を使用しないで補償係数
を最適かつ自動的に変化させることができるから構成が
簡単である。
As described above, in the present invention, an adder that adds the real part and the imaginary part of the identification error signal and a subtracter that subtracts the real part and the imaginary part of the interference polarization reception signal are provided, so that the magnitude of the real part and the imaginary part of the interference polarization received signal is When they are equal, the above 7J[] X corresponds to the quadrant to which they belong.
Since the compensation coefficient is controlled by changing the combination of outputs of the subtractor and the subtractor, the number of signal points that can be used for compensation coefficient control is increased, and rapid control speed can be obtained. Furthermore, the configuration is simple because the compensation coefficient can be optimally and automatically changed without using a multiplier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は16値蚕幅位相変調信号の各信号点および特定
の条件を満たす信号点を示す図、第2図は上記特定の条
件を検出する干渉1111#に別器の一例を示す回路図
、第3図は上記特定の粂件時に補償係数を変化させるよ
うにした偏波干渉除去回路の−例を示すブロック図、第
4図tilS値振幅位相変調信号のうち実数部と虚数部
の大きさが等しい信号点群を示す図、第5図は本発明に
使用するための上記条件を検出する干渉側識別器の一例
を示す回路図、第6図は本発明の一実施例を示すブロッ
ク図である。 図において、1−・・・・・識別誤差検出器、212Z
z、r・・・−相関器、3 、3’・・・・・・干渉@
識別器、4゜4′・・・・・・開閉器、5・−・・・低
域Pt&器、6・・・・−・偏波干渉減算回路、10・
・・・−識別器、11・・・・・・減算器、22・・・
・・・加算器、23・・・・・・減算器、30,33゜
35.36・・・・・・比較器、32,37,38・・
・・・・折返し回路、34.34a 〜34d 、39
a 〜39d・・・・−アンド回路、40.41・・・
・・・開閉器、50゜51・−・・−積分器、60−・
・・・・加算器、61・・・・・・乗算器。 代理人 弁理士 住 1)債 寒 第1図 第2図
Fig. 1 is a diagram showing each signal point of a 16-value silkworm width phase modulation signal and a signal point that satisfies a specific condition, and Fig. 2 is a circuit diagram showing an example of a separate device for the interference 1111# that detects the above-mentioned specific condition. , Fig. 3 is a block diagram showing an example of a polarization interference cancellation circuit that changes the compensation coefficient in the above-mentioned specific case, and Fig. 4 shows the magnitude of the real part and imaginary part of the tilS value amplitude phase modulation signal. FIG. 5 is a circuit diagram showing an example of an interference side discriminator for detecting the above conditions for use in the present invention, and FIG. 6 is a block diagram showing an embodiment of the present invention. It is a diagram. In the figure, 1-...Identification error detector, 212Z
z, r...-correlator, 3, 3'...interference @
Discriminator, 4゜4'...Switch, 5...Low frequency Pt& device, 6...Polarization interference subtraction circuit, 10...
...-Discriminator, 11...Subtractor, 22...
...Adder, 23...Subtractor, 30,33゜35.36...Comparator, 32,37,38...
...Folding circuit, 34.34a to 34d, 39
a ~ 39d...-AND circuit, 40.41...
...Switch, 50゜51...-Integrator, 60-...
... Adder, 61 ... Multiplier. Agent Patent Attorney Resident 1) Bonds Cold Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 相互に直交する2つの偏波を受信し、一方の受信信号に
補償係数を乗じて他方の受信信号に加えることにより偏
波干渉成分を除去する偏波干渉除去回路において、補償
後の受信信号とその識別値との誤差を検出する識別誤差
検出器と、該誤差検出話の出力する識別誤差信号の実数
部と虚数部との和および差を出力する加算器および減算
器と、干渉偏波側受信信号の実数部と虚数部の給体値が
等しhことを検出しかつどの象限に属するかに従って制
御信号を出す干渉側識別器と、該干渉側識別器の出力す
る制御信号に対応して前記加算器と減算器の出力信号の
符号組合せを変えて出力する開閉器と、#開閉器の出力
を平滑する低域P波器とを備えて、該低域P波器の出力
により前記補償係数を得るようにしたことt%倖とする
偏波干渉除去回路。
In a polarization interference cancellation circuit that receives two mutually orthogonal polarized waves and removes the polarization interference component by multiplying one received signal by a compensation coefficient and adding it to the other received signal, the received signal after compensation and An identification error detector that detects an error with the identification value, an adder and a subtractor that output the sum and difference between the real part and imaginary part of the identification error signal output from the error detection story, and an interference polarization side an interfering side discriminator that detects that the feed values of the real part and the imaginary part of a received signal are equal and outputs a control signal according to which quadrant it belongs to; and a control signal corresponding to the output of the interfering side discriminator. a switch that changes the sign combination of the output signals of the adder and the subtracter and outputs the same; and a low-frequency P-wave device that smoothes the output of the # switch; A polarization interference removal circuit that obtains a compensation coefficient by t%.
JP56153971A 1981-09-30 1981-09-30 Eliminating circuit for polarized wave interference Granted JPS5856545A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP56153971A JPS5856545A (en) 1981-09-30 1981-09-30 Eliminating circuit for polarized wave interference
US06/416,112 US4479258A (en) 1981-09-30 1982-09-09 Cross-polarization crosstalk canceller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56153971A JPS5856545A (en) 1981-09-30 1981-09-30 Eliminating circuit for polarized wave interference

Publications (2)

Publication Number Publication Date
JPS5856545A true JPS5856545A (en) 1983-04-04
JPS6239861B2 JPS6239861B2 (en) 1987-08-25

Family

ID=15574072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56153971A Granted JPS5856545A (en) 1981-09-30 1981-09-30 Eliminating circuit for polarized wave interference

Country Status (1)

Country Link
JP (1) JPS5856545A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057783A1 (en) * 2002-12-19 2004-07-08 Fujitsu Limited Ofdm transmission/reception apparatus
US7551678B2 (en) 2002-12-19 2009-06-23 Fujitsu Limited OFDM transceiver apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057783A1 (en) * 2002-12-19 2004-07-08 Fujitsu Limited Ofdm transmission/reception apparatus
US7551678B2 (en) 2002-12-19 2009-06-23 Fujitsu Limited OFDM transceiver apparatus

Also Published As

Publication number Publication date
JPS6239861B2 (en) 1987-08-25

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