JPS5869194A - タイムスロツト入替方式 - Google Patents

タイムスロツト入替方式

Info

Publication number
JPS5869194A
JPS5869194A JP16765181A JP16765181A JPS5869194A JP S5869194 A JPS5869194 A JP S5869194A JP 16765181 A JP16765181 A JP 16765181A JP 16765181 A JP16765181 A JP 16765181A JP S5869194 A JPS5869194 A JP S5869194A
Authority
JP
Japan
Prior art keywords
time slot
memory
output
address
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16765181A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6336199B2 (fr
Inventor
Yuji Kubota
久保田　雄二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16765181A priority Critical patent/JPS5869194A/ja
Publication of JPS5869194A publication Critical patent/JPS5869194A/ja
Publication of JPS6336199B2 publication Critical patent/JPS6336199B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP16765181A 1981-10-20 1981-10-20 タイムスロツト入替方式 Granted JPS5869194A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16765181A JPS5869194A (ja) 1981-10-20 1981-10-20 タイムスロツト入替方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16765181A JPS5869194A (ja) 1981-10-20 1981-10-20 タイムスロツト入替方式

Publications (2)

Publication Number Publication Date
JPS5869194A true JPS5869194A (ja) 1983-04-25
JPS6336199B2 JPS6336199B2 (fr) 1988-07-19

Family

ID=15853708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16765181A Granted JPS5869194A (ja) 1981-10-20 1981-10-20 タイムスロツト入替方式

Country Status (1)

Country Link
JP (1) JPS5869194A (fr)

Also Published As

Publication number Publication date
JPS6336199B2 (fr) 1988-07-19

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