JPS5882018U - Audio muting pulse generation circuit - Google Patents
Audio muting pulse generation circuitInfo
- Publication number
- JPS5882018U JPS5882018U JP17468981U JP17468981U JPS5882018U JP S5882018 U JPS5882018 U JP S5882018U JP 17468981 U JP17468981 U JP 17468981U JP 17468981 U JP17468981 U JP 17468981U JP S5882018 U JPS5882018 U JP S5882018U
- Authority
- JP
- Japan
- Prior art keywords
- generation circuit
- audio muting
- pulse generation
- electrode
- muting pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案にかかる音声ミューティングパルス発生
回路の実施例を示す回路図、第２図はプログラマブルユ
ニジャンクショントランジスタの等価回路を示す回路図
、第３図は同トランジスタの電圧電流特性を示す特性図
、第４図は音声ミュ ゛−テイングパルスを示す波形
図である。
２・・・・・・電界効果トランジスタ、３・・・・・・
プログラマブルユニジャンクショントランジスタ、Ｃ・
・・・・・コンデンサ、Ｒ１，Ｒ２，Ｒ３，Ｒ４・・曲
抵抗。Fig. 1 is a circuit diagram showing an embodiment of the audio muting pulse generation circuit according to the present invention, Fig. 2 is a circuit diagram showing an equivalent circuit of a programmable unijunction transistor, and Fig. 3 shows the voltage-current characteristics of the same transistor. The characteristic diagram, FIG. 4, is a waveform diagram showing the audio muting pulse. 2... Field effect transistor, 3...
Programmable unijunction transistor, C.
... Capacitor, R1, R2, R3, R4... Curved resistance.
Claims (1)
位端と逆阻止３端−子サイリスタの入力電極との間に接
続し、この逆阻止３端子サイリスタの制御電極をバイア
ス電圧端に接続し、出力電極と基準電位端との間に介挿
した抵抗との交点から音声ミューティングパルスを得る
ようにした音声ミューティングパルス発生回路。A capacitor that is charged based on the noise prediction signal is connected between the reference potential terminal and the input electrode of the reverse blocking 3-terminal thyristor, and the control electrode of this reverse blocking 3-terminal thyristor is connected to the bias voltage terminal, and the output An audio muting pulse generation circuit that obtains an audio muting pulse from the intersection of an electrode and a resistor inserted between an electrode and a reference potential end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17468981U JPS5882018U (en) | 1981-11-26 | 1981-11-26 | Audio muting pulse generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17468981U JPS5882018U (en) | 1981-11-26 | 1981-11-26 | Audio muting pulse generation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5882018U true JPS5882018U (en) | 1983-06-03 |
Family
ID=29966756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17468981U Pending JPS5882018U (en) | 1981-11-26 | 1981-11-26 | Audio muting pulse generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5882018U (en) |
-
1981
- 1981-11-26 JP JP17468981U patent/JPS5882018U/en active Pending
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